SN74LV374 Search Results

SN74LV374ANS

Contextual Info: SN54LV374A, SN74LV374A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS408H − APRIL 1998 − REVISED APRIL 2005 SN54LV374A . . . J OR W PACKAGE SN74LV374A . . . DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW 2 19 3 18 4 17 5 16 6 15 7 14 8 13

LV374A

Abstract: SN54LV374A SN74LV374A
Contextual Info: SN54LV374A, SN74LV374A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS408B – APRIL 1998 – REVISED MAY 2000 D D D D D description The ’LV374A devices are octal edge-triggered D-type flip-flops designed for 2-V to 5.5-V VCC operation.

Contextual Info: SN54LV374A, SN74LV374A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS408H − APRIL 1998 − REVISED APRIL 2005 D Ioff Supports Partial-Power-Down Mode SN54LV374A . . . J OR W PACKAGE SN74LV374A . . . DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW

Contextual Info: SN54LV374A, SN74LV374A OCTAL EDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH 3ĆSTATE OUTPUTS SCLS408H − APRIL 1998 − REVISED APRIL 2005 SN54LV374A . . . J OR W PACKAGE SN74LV374A . . . DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW 2 19 3 18 4 17 5 16 6 15 7 14 8

Contextual Info: SN54LV374, SN74LV374 OCTAL EDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH 3ĆSTATE OUTPUTS SCLS197B − FEBRUARY 1993 − REVISED APRIL 1996 D EPIC  Enhanced-Performance Implanted D D D D CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C

A115-A

Abstract: C101 LV374A SN54LV374A SN74LV374A SN74LV374ATRGYRG4 SN74LV374ANS
Contextual Info: SN54LV374A, SN74LV374A OCTAL EDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH 3ĆSTATE OUTPUTS SCLS408H − APRIL 1998 − REVISED APRIL 2005 SN54LV374A . . . J OR W PACKAGE SN74LV374A . . . DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW 2 19 3 18 4 17 5 16 6 15 7 14 8

Contextual Info: SN74LV374AĆEP OCTAL EDGEĆTRIGGERED DĆTYPE FLIPĆFLOP WITH 3ĆSTATE OUTPUTS SCLS500 – MAY 2003 D Controlled Baseline D D D D D D D D Ioff Supports Partial-Power-Down Mode – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of

Contextual Info: SN54LV374A, SN74LV374A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS408D – APRIL 1998 – REVISED AUGUST 2001 D D D D SN54LV374A . . . J OR W PACKAGE SN74LV374A . . . DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q

Contextual Info: SN74LV374AĆEP OCTAL EDGEĆTRIGGERED DĆTYPE FLIPĆFLOP WITH 3ĆSTATE OUTPUTS SCLS500A − MAY 2003 − REVISED MAY 2004 D Controlled Baseline D D D D D D D D Ioff Supports Partial-Power-Down Mode − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of

A115-A

Abstract: C101 LV374A SN54LV374A SN74LV374A
Contextual Info: SN54LV374A, SN74LV374A OCTAL EDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH 3ĆSTATE OUTPUTS SCLS408H − APRIL 1998 − REVISED APRIL 2005 SN54LV374A . . . J OR W PACKAGE SN74LV374A . . . DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW 2 19 3 18 4 17 5 16 6 15 7 14 8

Contextual Info: SN74LV374A-Q1 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SCLS468C − FEBRUARY 2003 − REVISED JANUARY 2008 D Qualified for Automotive Applications D Typical VOLP Output Ground Bounce PW PACKAGE (TOP VIEW) <0.8 V at VCC = 3.3 V, TA = 25°C

Contextual Info: SN74LV374AĆQ1 OCTAL EDGEĆTRIGGERED DĆTYPE FLIPĆFLOP WITH 3ĆSTATE OUTPUTS SCLS468B − FEBRUARY 2003 − REVISED MAY 2004 D Qualification in Accordance With D D D D D D D PW PACKAGE TOP VIEW AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control

A115-A

Abstract: AEC-Q100 C101 Q100 SN74LV374A
Contextual Info: SN74LV374AĆQ1 OCTAL EDGEĆTRIGGERED DĆTYPE FLIPĆFLOP WITH 3ĆSTATE OUTPUTS SCLS468B − FEBRUARY 2003 − REVISED MAY 2004 D Qualification in Accordance With D D D D D D D PW PACKAGE TOP VIEW AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control

Contextual Info: SN54LV374A, SN74LV374A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS408H − APRIL 1998 − REVISED APRIL 2005 SN54LV374A . . . J OR W PACKAGE SN74LV374A . . . DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW 2 19 3 18 4 17 5 16 6 15 7 14 8 13

Contextual Info: SN54LV374A, SN74LV374A OCTAL EDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH 3ĆSTATE OUTPUTS SCLS408H − APRIL 1998 − REVISED APRIL 2005 SN54LV374A . . . J OR W PACKAGE SN74LV374A . . . DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW 2 19 3 18 4 17 5 16 6 15 7 14 8

Contextual Info: SN54LV374, SN74LV374 OCTAL EDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH 3ĆSTATE OUTPUTS SCLS197B − FEBRUARY 1993 − REVISED APRIL 1996 D EPIC  Enhanced-Performance Implanted D D D D CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C

Contextual Info: SN54LV374A, SN74LV374A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS408E – APRIL 1998 – REVISED SEPTEMBER 2002 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 8Q 8D 7D 7Q 6Q 6D 5D 5Q CLK 1Q 1D 2D 2Q 3Q 3D 4D 4Q 20 1D 1Q OE VCC 1

Contextual Info: SN74LV374AĆEP OCTAL EDGEĆTRIGGERED DĆTYPE FLIPĆFLOP WITH 3ĆSTATE OUTPUTS SCLS500A − MAY 2003 − REVISED MAY 2004 D Ioff Supports Partial-Power-Down Mode D Controlled Baseline D D D D D D D − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of

SN74LV374

Contextual Info: SN74LV374 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SCLS197- FEBRUARY • EPIC Enhanced-Performance Implanted CMOS 2-(i Process DB, DW, OR PW PACKAGE (TOP VIEW) • Typical V q lp (Output Ground Bounce)

SN74LV374

Contextual Info: SN74LV374 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS S C L S 1 9 7 A - FEBRUARY 1993 - REVISED JULY 1995 • EPIC Enhanced-Performance Implanted CMOS 2-\l Process • Typical Vo lp (Output Ground Bounce) < 0.8 V at VCc = 3.3 V, TA = 25°C

Contextual Info: SN54LV374A, SN74LV374A OCTAL EDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH 3ĆSTATE OUTPUTS SCLS408H − APRIL 1998 − REVISED APRIL 2005 SN54LV374A . . . J OR W PACKAGE SN74LV374A . . . DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW 2 19 3 18 4 17 5 16 6 15 7 14 8

Contextual Info: SN54LV374A, SN74LV374A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS S C LS 408A - A P R IL 1998 - R EVISED JU NE 1998 EPIC Enhanced-Performance Implanted CMOS Process SN54LV374A . . . J OR W PACKAGE SN74LV374A . . . DB, DGV, DW, NS, OR PW PACKAGE

Contextual Info: SN54LV374, SN74LV374 OCTAL EDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH 3ĆSTATE OUTPUTS SCLS197B − FEBRUARY 1993 − REVISED APRIL 1996 D EPIC  Enhanced-Performance Implanted D D D D CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C

74LV374AT

Contextual Info: SN74LV374AT www.ti.com SCES632 – JUNE 2010 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS Check for Samples: SN74LV374AT FEATURES 1 • DB, DW, NS, OR PW PACKAGE TOP VIEW OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13