SN74HC10 Search Results

HC109

Abstract: SN54HC109 SN74HC109 SN74HC109D SN74HC109DR SN74HC109DT SN74HC109N SN74HC109NSR SNJ54HC109J SNJ54HC109W
Contextual Info: SN54HC109, SN74HC109 DUAL JĆK POSITIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH CLEAR AND PRESET SCLS470A − MARCH 2003 − REVISED OCTOBER 2003 D Wide Operating Voltage Range of 2 V to 6 V D Low Input Current of 1 µA Max D High-Current Outputs Drive Up To D Low Power Consumption, 40-µA Max ICC

HC10

Abstract: SN54HC10 SN74HC10 SN74HC10D SN74HC10DBR SN74HC10DR SN74HC10DT SN74HC10N SN74HC10NSR
Contextual Info: SN54HC10, SN74HC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCLS083D − DECEMBER 1982 − REVISED AUGUST 2003 D Wide Operating Voltage Range of 2 V to 6 V D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Consumption, 20-µA Max ICC SN54HC10 . . . J OR W PACKAGE

Contextual Info: SN54HC109, SN74HC109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCLS470 – MARCH 2003 D D D Wide Operating Voltage Range of 2 V to 6 V Low Input Current of 1 µA Max High-Current Outputs Drive Up To 10 LSTTL Loads 1 16 2 15 3 14 4 13

Contextual Info: SN54HC10, SN74HC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCLS083D − DECEMBER 1982 − REVISED AUGUST 2003 D Wide Operating Voltage Range of 2 V to 6 V D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Consumption, 20-µA Max ICC SN54HC10 . . . J OR W PACKAGE

Contextual Info: SN74HC10ĆEP TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCLS558 − JANUARY 2004 D Controlled Baseline D D D D D D D D D D − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −40°C to 125°C Enhanced Diminishing Manufacturing Sources DMS Support

HC109

Abstract: SNJ54HC109J SNJ54HC109W SN54HC109 SN74HC109 SN74HC109D SN74HC109DR SN74HC109DT SN74HC109N SN74HC109NSR
Contextual Info: SN54HC109, SN74HC109 DUAL JĆK POSITIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH CLEAR AND PRESET SCLS470A − MARCH 2003 − REVISED OCTOBER 2003 D Wide Operating Voltage Range of 2 V to 6 V D Low Input Current of 1 µA Max D High-Current Outputs Drive Up To D Low Power Consumption, 40-µA Max ICC

HC10

Abstract: SN54HC10 SN74HC10 SN74HC10D SN74HC10DBR SN74HC10DR SN74HC10DT SN74HC10N SN74HC10NSR
Contextual Info: SN54HC10, SN74HC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCLS083D − DECEMBER 1982 − REVISED AUGUST 2003 D Wide Operating Voltage Range of 2 V to 6 V D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Consumption, 20-µA Max ICC SN54HC10 . . . J OR W PACKAGE

SN54HC109

Abstract: SN74HC109 SN74HC109D SN74HC109DR SN74HC109DT SN74HC109N SN74HC109NSR SNJ54HC109J SNJ54HC109W
Contextual Info: SN54HC109, SN74HC109 DUAL JĆK POSITIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH CLEAR AND PRESET SCLS470A − MARCH 2003 − REVISED OCTOBER 2003 D Wide Operating Voltage Range of 2 V to 6 V D Low Input Current of 1 µA Max D High-Current Outputs Drive Up To D Low Power Consumption, 40-µA Max ICC

Contextual Info: SN54HC109, SN74HC109 DUAL JĆK POSITIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH CLEAR AND PRESET SCLS470A − MARCH 2003 − REVISED OCTOBER 2003 D Wide Operating Voltage Range of 2 V to 6 V D Low Input Current of 1 µA Max D High-Current Outputs Drive Up To D Low Power Consumption, 40-µA Max ICC

Contextual Info: SN74HC10-Q1 TRIPLE 3-INPUT POSITIVE-NAND GATE SCLS531A − AUGUST 2003 − REVISED APRIL 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D Typical tpd = 9 ns D ±4-mA Output Drive at 5 V D Low Input Current of 1 µA Max

SN74HC10N

Contextual Info: SN54HC10, SN74HC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCLS083D − DECEMBER 1982 − REVISED AUGUST 2003 D Wide Operating Voltage Range of 2 V to 6 V D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Consumption, 20-µA Max ICC SN54HC10 . . . J OR W PACKAGE

SN74HC10

Abstract: SN74HC10-Q1 SN74HC10QDREP SN74HC10QPWREP
Contextual Info: SN74HC10ĆEP TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCLS558 − JANUARY 2004 D Controlled Baseline D D D D D D D D D D − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −40°C to 125°C Enhanced Diminishing Manufacturing Sources DMS Support

Contextual Info: SN74HC10ĆQ1 TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCLS531A − AUGUST 2003 − REVISED APRIL 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D Typical tpd = 9 ns D ±4-mA Output Drive at 5 V D Low Input Current of 1 µA Max

Contextual Info: SN74HC10ĆEP TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCLS558 − JANUARY 2004 D Controlled Baseline D D D D D D D D D D − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −40°C to 125°C Enhanced Diminishing Manufacturing Sources DMS Support

Contextual Info: SN54HC10, SN74HC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCLS083D − DECEMBER 1982 − REVISED AUGUST 2003 D Wide Operating Voltage Range of 2 V to 6 V D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Consumption, 20-µA Max ICC SN54HC10 . . . J OR W PACKAGE

Contextual Info: SN54HC10, SN74HC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCLS083D − DECEMBER 1982 − REVISED AUGUST 2003 D Wide Operating Voltage Range of 2 V to 6 V D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Consumption, 20-µA Max ICC SN54HC10 . . . J OR W PACKAGE

HC10

Abstract: SN54HC10 SN74HC10 SN74HC10D SN74HC10DBR SN74HC10DR SN74HC10N SN74HC10NSR SNJ54HC10J
Contextual Info: SN54HC10, SN74HC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCLS083C – DECEMBER 1982 – REVISED NOVEMBER 2002 D Wide Operating Voltage Range of 2 V to 6 V D Outputs Can Drive Up to 10 LSTTL Loads D Low Power Consumption, 20-µA Max ICC D Typical tpd = 9 ns

SN74HC107D

Contextual Info: SN54HC107, SN74HC107 DUAL J K NEGATIVE EDGE TRIGGERED FLIP-FLOPS WITH CLEAR D2684, DECEMBER 1982 - REVISED JUNE 1989 SN54HC107 . J PACKAGE SN74HC107 D OR N PACKAGE Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-m il

TPM 2C

Abstract: SN54HC10 SN74HC10 TPM 3C
Contextual Info: SN54HC10, SN74HC10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCLS083A - DECEMBER 1982 - REVISED JANUARY 1996 Package Options Include Plastic Small-Outline D and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

Contextual Info: SN74HC10-Q1 TRIPLE 3-INPUT POSITIVE-NAND GATE SCLS531A − AUGUST 2003 − REVISED APRIL 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D Typical tpd = 9 ns D ±4-mA Output Drive at 5 V D Low Input Current of 1 µA Max

Contextual Info: SN54HC10, SN74HC10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCLS083B – DECEMBER 1982 – REVISED MAY 1997 D SN54HC10 . . . J OR W PACKAGE SN74HC10 . . . D OR N PACKAGE TOP VIEW Package Options Include Plastic Small-Outline (D) and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and

Contextual Info: SN54HC10, SN74HC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCLS083D − DECEMBER 1982 − REVISED AUGUST 2003 D Wide Operating Voltage Range of 2 V to 6 V D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Consumption, 20-µA Max ICC SN54HC10 . . . J OR W PACKAGE

SN74HC10E

Contextual Info: SN74HC10ĆEP TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCLS558 − JANUARY 2004 D Controlled Baseline D D D D D D D D D D − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −40°C to 125°C Enhanced Diminishing Manufacturing Sources DMS Support

HC10QQ1

Abstract: AEC-Q100 HC10 Q100 SN74HC10-Q1 SN74HC10QDRQ1 SN74HC10QPWRQ1
Contextual Info: SN74HC10-Q1 TRIPLE 3-INPUT POSITIVE-NAND GATE SCLS531 – AUGUST 2003 D D D D D D D D D D Qualification in Accordance With AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval