SN74B Search Results

Contextual Info: SN74BCT29854 8-BIT TO 9-BIT PARITY BUS TRANSCEIVER S C B S 257- SEPTEMBER 1987 - REVISED NOVEMBER 1993 DW OR NT PACKAGE • BICMOS Process With TTL Inputs and Outputs T O P V IE W • State-of-the-Art BICMOS Design Significantly Reduces Standby Current

i486

Contextual Info: SN74BCT2141 2-WAY 8K x 18 SYNCHRONOUS CACHE DATA RAM D3613. A UG UST 1990 2-Way 8K x 18 Bit Architecture FN PACKAGE TOP VIEW Synchronous Read and Write Access at 50 MHz Clock Frequency Incorporates Burst Counter for Burst-Read (Read-Hit) Cycles or Burst-Write (Line-Fill)

Contextual Info: SN54BCT2828B, SN74BCT2828B 10-BIT BUS/MOS MEMORY DRIVERS WITH 3-STATE INVERTING OUTPUTS _ D3635, SEPTEMBER 1990 S N 54B C T282B B . . . J T P A C K A G E BiCMOS Design Substantially Reduces S N 7 4B C T 28 2 8B . . . D W O R N T P A C K A G E

D425G

Abstract: ACT21 SN74BCT2166
Contextual Info: SN74BCT2163, SN74BCT2164, SN74BCT2166 16K x 5 CACHE ADDRESS COMPARATORS/TAG RAMs SCHS012-D3513, JUNE 1990-REVISED NOVEMBER 1991 SN74BCT2163, SN74BCT2164 Fast Address to MATCH Delay. 12 ns Max FM PACKAGE CTOP VIEW ’BCT2163 Has Totem-Pole Match Output Q\*~

74BCT29827

Abstract: LT 7242
Contextual Info: SN74BCT29827A, SN74BCT2982BA 10-BIT BUFFERS AND BUS DRIVERS WITH 3-STATE OUTPUTS D 2 9 7 7 . APRIL 1 9 8 7 -R E V IS E D M A Y 1 9 8 8 DW OR N T P A C K A G E 1 BiCMOS Design Substantially Reduces Standby Current TO P V IEW G ill 1 A id 2 A2 C 3 A3 C 4

Contextual Info: SN74BCT29853 8-BIT TO 9-BIT PARITY BUS TRANSCEIVER SCBS002D - SEPTEMBER 1987 - REVISED APRIL 1994 DW OR NT PACKAGE TOP VIEW BiCMOS Process With TTL Inputs and Outputs State-of-the-Art BiCMOS Design Significantly Reduces Standby Current OEA[ A1[ A2[ A3 [

SCAD002

Abstract: BCT2164
Contextual Info: SN74BCT2163, SN74BCT2164, SN74BCT2166 16K x 5 CACHE ADDRESS COMPARATORS/TAG RAMs _ D3513, JUNE 1990 — REVISED A U G U S T 1990 • Fast Address to MATCH Delay . . .12-ns Max • ’BCT2163 has Totem-Pole Match Output

T541A

Contextual Info: SN54BCT541, SN74BCT541A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS011D - JULY 1988 - REVISED SEPTEMBER 1994 SN54BCT541 . . . J OR W PACKAGE SN74BCT541A . . . DW OR N PACKAGE TOP VIEW State-of-the-Art BiCMOS Design Significantly Reduces Ic c z 3-State Outputs Drive Bus Lines or Buffer

Contextual Info: SN74BCT2160 8K X 4 2-WAY CACHE ADDRESS COWIPARATOR/DATA RAM D 3512, JU NE 1990 FM PACKAGE TOP VIEW LO ^ n w r o < < < < < < Fast Address to Match Time . . . 12 ns Max 2-Way Architecture Significantly Improves Hit Rate 4 * Implements LRU Replacement Algorithm

BCT8373A

Contextual Info: SN54BCT8373A, SN74BCT8373A SCAN TEST DEVICES WITH OCTAL D-TYPE LATCHES SCBS044F – JUNE 1990 – REVISED JULY 1996 D D D D D description The ’BCT8373A scan test devices with octal D-type latches are members of the Texas Instruments SCOPE testability integratedcircuit family. This family of devices supports IEEE

Contextual Info: SN54BCT2240, SN74BCT2240 OCTAL BUFFERS AND LINE/MOS DRIVERS WITH 3-STATE OUTPUTS SCBS030D – SEPTEMBER 1988 – REVISED APRIL 1994 • • • SN54BCT2240 . . . J OR W PACKAGE SN74BCT2240 . . . DB, DW, OR N PACKAGE TOP VIEW State-of-the-Art BiCMOS Design

Contextual Info: SN54BCT620A, SN74BCT620A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS001B – SEPTEMBER 1987 – REVISED NOVEMBER 1993 • • • SN54BCT620A . . . J OR W PACKAGE SN74BCT620A . . . DW OR N PACKAGE TOP VIEW State-of-the-Art BiCMOS Design Significantly Reduces ICCZ

Contextual Info: SN74BCT29843 9-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCBS022C – FEBRUARY 1989 – REVISED NOVEMBER 1993 • • • DW OR NT PACKAGE TOP VIEW BiCMOS Process With CMOS Inputs and TTL Outputs Substantially Reduces Standby Current Input Has 50 kΩ

BCT543

Abstract: 106d1
Contextual Info: SN54BCT543, SN74BCT543 OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS026C – NOVEMBER 1988 – REVISED APRIL 1994 • • • • SN54BCT543 . . . JT OR W PACKAGE SN74BCT543 . . . DW OR NT PACKAGE TOP VIEW State-of-the-Art BiCMOS Design Significantly Reduces ICCZ

BCT245

Abstract: BCT8245A F245 SN54BCT8245A SN74BCT8245A
Contextual Info: SN54BCT8245A, SN74BCT8245A SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS SCBS043E – MAY 1990 – REVISED JULY 1996 D D D D D description The ’BCT8245A scan test devices with octal bus transceivers are members of the Texas Instruments SCOPE testability integratedcircuit family. This family of devices supports IEEE

V5050

Abstract: BCT244 F244 SN54BCT8244A SN74BCT8244A
Contextual Info: SN54BCT8244A, SN74BCT8244A SCAN TEST DEVICES WITH OCTAL BUFFERS SCBS042E – FEBRUARY 1990 – REVISED JULY 1996 D D D D D description The ’BCT8244A scan test devices with octal buffers are members of the Texas Instruments SCOPE testability integrated-circuit family. This

Contextual Info: SN54BCT241, SN74BCT241 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS005D – OCTOBER 1987 – REVISED APRIL 1994 • • • • SN54BCT241 . . . J OR W PACKAGE SN74BCT241 . . . DB, DW OR N PACKAGE TOP VIEW State-of-the-Art BiCMOS Design Significantly Reduces ICCZ

Contextual Info: SN74BCT2414 MEMORY DECODER WITH ONĆCHIP SUPPLY VOLTAGE MONITOR SCBS059B − MARCH 1989 − REVISED NOVEMBER 1993 • • • • • • • DW OR N PACKAGE TOP VIEW BiCMOS Design Substantially Reduces Standby Current Two Independent 2-Line to 4-Line Decoders

Contextual Info: SN54BCT8374A, SN74BCT8374A SCAN TEST DEVICES WITH OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS SCBS045E – JUNE 1990 – REVISED JULY 1996 D D D D D description The ’BCT8374A scan test devices with octal edge-triggered D-type flip-flops are members of the Texas Instruments SCOPE testability

Contextual Info: SN54BCT8245A, SN74BCT8245A SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS SCBS043E – MAY 1990 – REVISED JULY 1996 D D D D D description The ’BCT8245A scan test devices with octal bus transceivers are members of the Texas Instruments SCOPE testability integratedcircuit family. This family of devices supports IEEE

Contextual Info: SN74BCT25642 25ĆΩ OCTAL BUS TRANSCEIVER ą SCBS047C − DECEMBER 1989 − REVISED NOVEMBER 1993 • • • • • • • DW OR NT PACKAGE TOP VIEW State-of-the-Art BiCMOS Design Significantly Reduces ICCZ ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds

Contextual Info: SN54BCT574, SN74BCT574 OCTAL TRANSPARENT D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCBS074C – SEPTEMBER 1991 – REVISED MARCH 2003 D D Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ Full Parallel Access for Loading

Contextual Info: SN54BCT245, SN74BCT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS013H – SEPTEMBER 1998 – REVISED MAY 2002 D D SN54BCT245 . . . J OR W PACKAGE SN74BCT245 . . . DB, DW, N, NS, OR PW PACKAGE TOP VIEW 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers

Contextual Info: SN54BCT540, SN74BCT540A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS012E – JULY 1988 – REVISED MARCH 2003 D D D Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer