SN74AL Search Results

Contextual Info: SN54ALS259, SN74ALS259 8 BIT AD D R E S S A B LE LA TC HES D2661, DECEMBER 1982-REVISED MAY 1986 S N 5 4 A L S 2 5 9 . J PACKAGE S N 7 4 A L S 2 5 9 . . . D OR N PACKAGE 8-Bit Parallel-Out Storage Register Performs Serial-to-Parallel Conversion with Storage

IR 30 D1

Contextual Info: SN74ALS236 64 x 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SDAS107A-OCTOBER 1986 - REVISED SEPTEMBER 1993 Asynchronous Operation Organized as 64 Words by 4 Bits DW OR N PACKAGE TOP VIEW r NC [ 1 Data Rates From 0 to 30 MHz 3-State Outputs 16 J VCC 15 ] S O

Contextual Info: SN54ALS05A, SN74ALS05A HEX INVERTERS WITH OPEN-COLLECTOR OUTPUTS S D A S 1 9 0 A - APRIL 1982 - R EVISED DECEMBER 1994 Package Options Include Plastic Small-Outllne D Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mll DIPs

74AS374

Abstract: IC CLK 374 74ALS374A
Contextual Info: SN74ALS374A, SN74AS374, SN54ALS374A, SN54AS374 OCTAL D-TYPE EDGE-TRIGGERED FUP-FLOPS WITH 3-STATE OUTPUTS D 2 6 6 1 , A P H IL 1982 - R E V IS E D M A Y 1986 D-Type Flip-Flops In a Single Package S N 5 4 A L S 3 7 4 A , S N 5 4 A S 3 7 4 . . . J PAC KAG E

Contextual Info: SN54ALS29823, SN74ALS29823 9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS S D A S 1 4 6 B -J A N U A R Y 198« - R EVISED JANUARY 1995 Functionally Equivalent to AMD’s AM29823 Provide Extra Data Width Necessary for Wider Address/Data Paths or Buses With

56DL

Abstract: SN74AS841
Contextual Info: TYPES SN54ALS841, SN54AS841, SN54ALS842, SN54AS842 SN74ALS841, SN74AS841, SN74ALS842, SN74AS842 10-BIT BUS INTERFACE D TYPE LATCHES WITH 3 STATE OUTPUTS D 2 8 2 5 , DECEMBER 1983 • 3-State Buffer-Type Outputs Drive Bus-Lines Directly • Bus-Structured Pinout

Contextual Info: SN74ALS233B 16x5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SCAS253 - MARCH 1990 - REVISED JUNE 1992 • Independent Asychronous Inputs and Outputs DW OR N PACKAGE TOP VIEW • 16 Words by 5 Bits OE [ 1 FULL-1 [ 2 • Data Rates From 0 to 40 MHz • Fall-Through Ti me. . . 14 ns Typ

74als1010

Abstract: 74ALS1010A 54als1010
Contextual Info: TYPES SN54ALS1010A, SN74ALS1010A TRIPLE 3-INPUT POSITIVE-NAND BUFFERS 0 2 6 6 1 , A P R IL 1 9 8 2 — R E V IS E D D E C E M B E R 1 9 8 3 Buffer Version o f 'A L S 1 0 SN 54 A LS 1 0 1 0 A . . . J PACKAGE Package O ptions Include Both Plastic and Ceram ic C h ip Carriers in Addition to Plastic

Contextual Info: SN54ALS1034, SN54AS1034A, SN74ALS1034, SN74AS1034A HEX DRIVERS SDAS063B - APRIL 19S2 - REVISED JANUARY 1995 'AS1034A Offer High Capacltlve-Dri ve Capability Noninverting Drivers Package Options Include Plastic Small-Outllne D Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and

74ALS234

Contextual Info: SN54ALS234, SN74ALS234 64 x 4 ASYNCHRONOUS FIRST-IN FIRST OUT MEMORY 0 2 9 5 8 , OCTOBER 1 9 8 6 Asynchronous Operation S N 54A LS 234 . . . J PACKAGE S N 74A LS 234 . . . 0 OR N PACKAGE Organized as 6 4 Words of 4 Bits Management Products TOP VIEW! Data Rates from 0 to 30 MHz

Contextual Info: SN54AS760, SN74ALS760, SN74AS760 OCTAL BUFFERS AND LINE DRIVERS WITH OPEN-COLLECTOR OUTPUTS S D A S 1 4 1 A - DE CE M B E R 1983 - REVISED JA NUARY 1995 SN54AS760. . . J PACKAGE SN74ALS760, SN74AS760. . . DW OR N PACKAGE TOP VIEW • Open-Collector Outputs Drive Bus Lines or

74ALS8003

Contextual Info: TYPES SN54ALS8003, SN74ALS8003 DUAL 2-INPUT POSITIVE-NAND GATES D 2 7 4 6 . JU LY 1 9 8 3 -R E V IS E D DECEMBER 1 9 8 3 • Package Options Include Both Plastic and Ceramic Chip Carriers in Addition to Plastic and Ceramic DIPs. S N 54A LS 8003 . . . JG PACKAGE

Contextual Info: SN74ALS2541 OCTAL UNE DRIVERS/MOS DRIVERS WITH 3-STATE OUTPUTS JU NE 1984 - REV ISED M A Y 19M 3-Stata Outputs Drive Bus Lina« or Buffar Memory Address Registers • S N 7 4 A L S 2 S 4 1 . . D W O H N P A C K A G E T O P V IE W P-N-P Inputs Reduce D-C Loading

bd 9d

Abstract: SN74ALS29841
Contextual Info: SN74ALS29841 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS S D A S 1 4 9 A - JU N E 1 9 8 8 - REVISED JA N U A R Y 1995 3-State Buffer-Type Outputs Drive Bus Lines Directly DW OR NT PACKAGE TOP VIEW Bus-Structured Pinout m Provides Extra Bus-Driving Latches

Contextual Info: SN74ALS166 PARALLEL-LOAD 8-BIT SHIFT REGISTERS D2«»1, APRIL 1982 - REVISED OCTOBER 1988 Synchronous Load Direct Overriding Clear Parallel to Serial Conversion SN74ALS106 D O R N PACKAGE TOP VIEW U i 6 ] v Cc SE F » C Package Options Include Plastic 'Small

Contextual Info: SN74ALS232B 1 6 x 4 ASYNCHRONOUS FIRST IN, FIRST OUT MEMORY D3247 • Independent Asynchronous Inputs and Outputs DW OR N PACKAGE Package Options Include Plastic "Sm all O utline" Packages, Plastic Chip Carriers, and Standard Plastic 300-m il DIPs OE C TOP VIEW

Contextual Info: SN54ALS1244A, SN74ALS1244A OCTAL BUFFERS AND DRIVERS WITH 3-STATE OUTPUTS SD A S1B 6B-JU LY 1990-R E V IS E D JANUARY 1995 Low-Power Versions of 'ALS244 Series 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers pnp Inputs Reduce dc Loading

s468a

Abstract: SN74ALS465A
Contextual Info: TYPES SN54ALS465A THRU SN54ALS468A, SN74ALS465A THRU SN74ALS468A OCTAL BUFFERS WITH 3 STATE OUTPUTS D 2 6 6 1 , A P R IL 1 9 8 2 - R E V I S E D D E C E M B E R 1 9 8 3 Mechanically and Functionally Interchangeable with D M 7 1 / 8 1 L S 9 7 and D M 7 1 / 8 1 L S 9 8

74as32

Contextual Info: SN54ALS32, SN54AS32, SN74ALS32, SN74AS32 QUADRUPLE 2-INPUT POSITIVE-OR GATES D 2 6 6 1 , A P R IL 1 9 8 2 - R E V I S E D M A Y 1 9 8 6 • Package Options Include Plastic "Sm all Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-m il

CO2V

Contextual Info: SN74ALVC16600 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS JA N U A R Y 1993 Member of the Texas Instruments Widebus Family DGG OR DL PACKAGE TOP VIEW ÖEÄE [ LEAB [ A1 [ GND [ A2 [ A3 [ EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process

Q7910

Abstract: SN74ALS2232A
Contextual Info: SN74ALS2232A 64 x 8 ASYNCHRONOUS FIRST-IN FIRST-OUT MEMORY D3091, F E B R U A R Y 1988 - R E V IS E D M A R C H 1990 Independent Asynchronous Inputs and Outputs NT PA C K A G E ITO P VIEW [ DOC D1 C D2C D3C 64 Words by 8 Bits rst Data Rates from 0 to 40 MHz

10D13

Contextual Info: SN54ALS29821, SN74ALS29821 10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS145B - JANUARY 1986 - REVISED JANUARY 1995 SN54ALS29821. . . JT PACKAGE SN74ALS29821 . . . DW OR NT PACKAGE TOP VIEW Functionally Equivalent to AMD’s AM29821 Provide Extra Data Width Necessary for

Contextual Info: SN54ALS273, SN74ALS273 OCTAL D-TYPE FLIP-FLOPS WITH CLEAR S D A S 2 1 8 A -A P R IL 1982 - REVISED DECEMBER 1994 SN54ALS273 . . . J PACKAGE SN74ALS273. . . DW OR N PACKAGE TOP VIEW Contain Eight Flip-Flops With Single-Rail Outputs Buffered Clock and Direct-Clear inputs

74as74

Contextual Info: SN74ALS74A, SN74AS74, SN54ALS74A, SN54AS74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET D 2M 1, APRIL 1982 - REVISED SEPTEM BER 1987 Package Options Includa Plaatlc "Sm a ll OutHna" Package!, Ceramlc Chip Carrlara. and Standard Plattlc and Caramic 300-mll