SLIS096 Search Results

Contextual Info: TPIC6596 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS096A − APRIL 2000 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typ D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

TPIC6596N

Abstract: TPIC6596 TPIC6596DWG4 TPIC6596DWRG4
Contextual Info: TPIC6596 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS096A − APRIL 2000 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typ D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6596 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS096A − APRIL 2000 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typ D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

TPIC6596

Contextual Info: TPIC6596 POWER LOGIC 8-BIT SHIFT REGISTER SLIS096 – APRIL 2000 D D D D D D D D Low rDS on . . . 1.3 Ω Typ Avalanche Energy . . . 75 mJ Eight Power DMOS Transistor Outputs of 250-mA Continuous Current 1.5-A Pulsed Current Per Output Output Clamp Voltage at 45 V

Contextual Info: TPIC6596 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS096A − APRIL 2000 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typ D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6596 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS096A − APRIL 2000 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typ D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6596 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS096A − APRIL 2000 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typ D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6596 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS096A − APRIL 2000 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typ D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6596 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS096A − APRIL 2000 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typ D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6596 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS096A − APRIL 2000 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typ D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6596 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS096A − APRIL 2000 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typ D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6596 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS096A − APRIL 2000 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typ D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6596 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS096A − APRIL 2000 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typ D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6596 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS096A − APRIL 2000 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typ D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1