SINGLE-CYCLE PROCESSOR Search Results

ST EZ 728

Abstract: ADSP-2181 "analog devices" adsp 2181 and application notes "analog devices" adsp 2181 and byte DMA 2 way splitter, circuit diagram ADSP-2181 ez-kit free software adsp-2181kst, ad1847 DESIGN AND IMPLEMENTATION 16-BIT BARREL SHIFTER SRAM-16K AD1847
Contextual Info: a FEATURES PERFORMANCE 30 ns Instruction Cycle Time @ 5.0 Volts 33 MIPS Sustained Performance 34.7 ns Instruction Cycle Time @ 3.3 Volts Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle

AD1847

Abstract: ADSP-2100 ADSP-2181 ADSP2185L ADSP-2185L
Contextual Info: a FEATURES PERFORMANCE 19 ns Instruction Cycle Time @ 3.3 Volts, 52 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle Multifunction Instructions

strain guage

Abstract: C3189 4 bit barrel shifter circuit for left shift dsp 32 c processor adsp 218x user manual AD1847 ADSP-2100 ADSP-2181 ADSP2185L ADSP-2185L
Contextual Info: a FEATURES PERFORMANCE 19 ns Instruction Cycle Time @ 3.3 Volts, 52 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle Multifunction Instructions

C3174

Abstract: McKenzie transistor c3174 ADSP2187L ADSP-2187L AD1847 ADSP-2100 ADSP-2181 8K24
Contextual Info: a FEATURES PERFORMANCE 19 ns Instruction Cycle Time @ 3.3 Volts, 52 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle Multifunction Instructions

001C

Abstract: AD1847 ADSP-2100 ADSP-2181 ADSP-2189M
Contextual Info: a FEATURES PERFORMANCE 13.3 ns Instruction Cycle Time @ 2.5 Volts Internal , 75 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle Multifunction Instructions

evelo

Contextual Info: ANALOG DEVICES DSP Microcomputer AD6F-2186L FEATURES PERFORMANCE 30 ns Instruction Cycle Time 33 M IPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle

ADSP-2186M

Abstract: AD73322 ADSP-2100 ADSP-2181 ADSP-2189M load program on ADSP-2189M 2186M
Contextual Info: a DSP Microcomputer ADSP-2186M FEATURES Performance 13.3 ns Instruction Cycle Time @ 2.5 V Internal , 75 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle

Contextual Info: ANALOG DEVICES FEATURES PERFORMANCE 25 ns Instruction Cycle Tim e 40 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture A llow s Dual Operand Fetches in Every Instruction Cycle M ultifunction Instructions

2184S

Contextual Info: ANALOG DEVICES Preliminary Technical Data FEATURES PERFORMANCE 25 ns Instruction Cycle Tim e 40 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture A llow s Dual Operand Fetches in Every Instruction Cycle

il6c

Contextual Info: ANALOG DEVICES Preliminary Technical Data FEATURES PERFORMANCE 25 ns Instruction Cycle Tim e 40 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture A llow s Dual Operand Fetches in Every Instruction Cycle

001C

Abstract: AD1847 ADSP-2100 ADSP-2181 ADSP-2184L
Contextual Info: a DSP Microcomputer ADSP-2184L Preliminary Technical Data FEATURES PERFORMANCE 25 ns Instruction Cycle Time 40 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle

Contextual Info: 2/24/00 7 AM a FEATURES PERFORMANCE 13.3 ns Instruction Cycle Time @ 2.5 Volts Internal , 75 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle

Contextual Info: ANALOG DEVICES FEATURES PERFORMANCE 30 ns Instruction Cycle Tim e 33 M IPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture A llow s Dual Operand Fetches in Every Instruction Cycle M ultifunction Instructions

load program on ADSP-2189M

Abstract: 2 way splitter, circuit diagram bms battery resistor CMS CODE ADSP-2100 ADSP-2181 ADSP-2189M 001C AD1847 ADSP-2189MBST-266 CIRCUIT
Contextual Info: 7/29/99 2 PM a FEATURES PERFORMANCE 13.3 ns Instruction Cycle Time @ 2.5 Volts Internal , 75 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle

ADSP-2185N

Abstract: ADSP-2100 ADSP-2184N ADSP-2186N ADSP-2187N ADSP-2189M D1881 ca144
Contextual Info: a DSP Microcomputer ADSP-218xN Series PERFORMANCE FEATURES 12.5 ns Instruction Cycle Time @1.8 V Internal , 80 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle

Contextual Info: 12/2/99 3:30 PM a FEATURES PERFORMANCE 25 ns Instruction Cycle Time 40 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle Multifunction Instructions

001C

Abstract: AD1847 ADSP-2100 ADSP-2181 ADSP2183 ADSP-2183
Contextual Info: a FEATURES PERFORMANCE 19 ns Instruction Cycle Time from 26.32 MHz Crystal @ 3.3 Volts 52 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle Multifunction Instructions

001C

Abstract: AD1847 ADSP-2100 ADSP-2181 ADSP-2186L ADSP-2186LBST-160 ADSP-2186LBCA-160 ADSP-2186LBST-133 ADSP-2186LKST-160
Contextual Info: a FEATURES PERFORMANCE 25 ns Instruction Cycle Time 40 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle Multifunction Instructions Power-Down Mode Featuring Low CMOS Standby

AD1847

Abstract: ADSP-2100 ADSP-2181 ADSP2185 ADSP-2185 00000-07FFF
Contextual Info: a FEATURES PERFORMANCE 30 ns Instruction Cycle Time 33 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle Multifunction Instructions Power-Down Mode Featuring Low CMOS Standby

AD73322

Abstract: ADSP-2100 ADSP-2181 ADSP-2186L ADSP-2189M ADSP-2186LBST-160 ADSP-2186LBCA-160 ADSP-2186LBST-133 ADSP-2186LKST-160
Contextual Info: a FEATURES Performance 25 ns Instruction Cycle Time 40 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle Multifunction Instructions Power-Down Mode Featuring Low CMOS Standby

adsp-2186 instruction set

Abstract: adsp 2186 instruction set strain guage ADSP-2181 ez-kit program transistor 13003 AD1847 ADSP-2100 ADSP-2181 ADSP2186 ADSP-2186
Contextual Info: a FEATURES PERFORMANCE 25 ns Instruction Cycle Time 40 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle Multifunction Instructions Power-Down Mode Featuring Low CMOS Standby

001C

Abstract: AD1847 ADSP-2100 ADSP-2181 ADSP-2186L 73D13 ADSP-2186LBST-133
Contextual Info: a FEATURES PERFORMANCE 30 ns Instruction Cycle Time 33 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle Multifunction Instructions Power-Down Mode Featuring Low CMOS Standby

adsp 2186 instruction set

Abstract: AD73322 ADSP-2100 ADSP-2181 ADSP2186 ADSP-2186 ADSP-2189M 347mW
Contextual Info: a FEATURES PERFORMANCE 25 ns Instruction Cycle Time 40 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle Multifunction Instructions Power-Down Mode Featuring Low CMOS Standby

strain guage

Abstract: AD1847 ADSP-2100 ADSP-2181 ADSP2185 ADSP-2185 D2385
Contextual Info: a FEATURES PERFORMANCE 30 ns Instruction Cycle Time 33 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle Multifunction Instructions Power-Down Mode Featuring Low CMOS Standby