SIMU Search Results

74170

Abstract: OF IC 74170
Contextual Info: TTL MSI TYPES SN54170, SN54LS170. SN74170, SN74LS170 4-BY-4 REGISTER FILES WITH OPEN-COLtECTOR OUTPUTS B U L L E T IN N O , D L -S 7 6 1 1 3 4 9 , M A R C H 1 9 7 4 — R E V IS E D O C T O B E R 1 9 7 6 • Separate Read/Write Addressing Permits Simultaneous Reading and Writing

Video RAM

Abstract: TMS55165
Contextual Info: TMS55165 262144 BY 16-BIT MULTIPORT VIDEO RAM SMVS165B-AUGUST1992-flEVISED JANUARY 1993 DGH PACKAGEt TOP VIEW DRAM : 262 144 Words x 16 Bits SAM: 256 Words x 16 Bits Dual Port Accessibility - Simultaneous and Asynchronous Access From the DRAM and SAM Ports

toshiba saw filter

Abstract: vestigial sideband filter toshiba 34-3D DDE10S F1345 F1342B
Contextual Info: 9097251 TOSHIBA TUBES/LCDS TOSHIBA 99D 02105 {TUBES/LCDS* ^ De| .T - 6 TDTTSSl y -05 □DDE10S S | SAW Devices for TV Broadcasting Equipment SAW Vestigal Sideband Filter SAW Vestigial Sideband F ilte r - This is used in a simulated signal generator for T V

TSB12LV41

Contextual Info: DATA TRANSMISSION C o n s u m e r Electronics G o Digital w ith N e w Link-Layer Controllers he TSB12LV41 for MPEG2/DSS receiving IEEE 1394 packets simulta­ and the TSB12LV42 for digital neously. A separate, implemented video data streams are TTs latest 8-Kbyte FIFO, accessible via the BDIF,

Contextual Info: DS92LV1260 DS92LV1260 Six Channel 10 Bit BLVDS Deserializer Literature Number: SNLS134E DS92LV1260 Six Channel 10 Bit BLVDS Deserializer General Description Features The DS92LV1260 integrates six deserializer devices into a single chip. The chip uses a 0.25u CMOS process technology. The DS92LV1260 can simultaneously deserialize up to

flyback

Abstract: Average simulations of FLYBACK converters with SPICE3 UC3845 pspice model SEM-800 dixon flyback smps uc3845 UC3845 spice model SUBCKT XFMR 1 2 3 4. RP 1 2 1MEG voltage controlled pwm generator 0 to 100 pspice model uc3845 isolated smps Spice model xfmr
Contextual Info: Average simulations of FLYBACK converters with SPICE3 Christophe BASSO May 1996 Within the wide family of Switch Mode Power Supplies SMPS , the Flyback converter represents the preferred structure for use in small and medium power applications such as wall

NET0260

Abstract: 3845 n equivalent VALUE IC net219 LTspice eldo TSH300
Contextual Info: Development of the Analog Macromodel for TSH300, ultra low-noise high-speed operational amplifier Angelo Marotta angelo.marotta@st.com STMicroelectronics May 2011 Abstract An unified analog macromodel, for Spice-like simulators, was implemented for TSH300 operational amplifier matching the real DC, Transient and AC behavior

IS42VS16100E

Abstract: 42VS16100E IS42VS16100E-75BLI
Contextual Info: IS42VS16100E 512K Words x 16 Bits x 2 Banks 16Mb SYNCHRONOUS DYNAMIC RAM FEATURES • Clock frequency: 133, 100, 83 MHz • Fully synchronous; all signals referenced to a positive clock edge • Two banks can be operated simultaneously and independently • Dual internal bank controlled by A11

4558f

Abstract: 4558 PIN ca 4558 Sim card diagram 4558 C esd sim card 4558 diagram application 4558 4558 dv 4558 C equivalent
Contextual Info: LTC4558 Dual SIM/Smart Card Power Supply and Interface FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION Power Management and Control for Two SIM Cards or Smart Cards Independent 1.8V/3V VCC Control for Both Cards Supports Simultaneous Powering of Both Cards

Contextual Info: TMS55160 262144 BY 16-BIT MULTIPORT VIDEO RAM SMVS160B-AUGUST1992-REVISED JANUARY 1993 * * * * * DGH PACKAGEt DRAM : 262144 Words x 16 Bits SAM: 256 Words x 16 Bits TOP VIEW Dual Port Accessibility - Simultaneous and Asynchronous Access From the DRAM and

8051 using I2C BUS

Abstract: philips 8051 i2c microcontroller project using 8051 microcontroller bus system "test bus" microcontroller "test bus" 80C552 register map
Contextual Info: C Compiler • Real-Time OS • Simulator • Training • Evaluation Boards Using and Programming the I2C BUS Application Note 153 June 8, 2000, Munich, Germany by Keil Support, Keil Elektronik GmbH support.intl@keil.com +49 89 456040-0 This Application Note describes programming of the I2C Bus for various devices. Included is the

Contextual Info: Product Number: 19276 TESTER, X3 COMBO, WITH DUAL PLATE Features & Benefits: • • • • • • • • Simultaneous Testing Of Wrist Strap* And Foot Wear In Up To 3 Seconds Reduces time spent testing personal grounding devices* used in ESD Control Plans

Contextual Info: ADC122S706 ADC122S706 Dual 12-Bit, 500 kSPS to 1 MSPS, Simultaneous Sampling A/D Converter Literature Number: SNAS408 ADC122S706 Dual 12-Bit, 500 kSPS to 1 MSPS, Simultaneous Sampling A/D Converter General Description Features The ADC122S706 is a dual 12-bit, 500 kSPS to 1 MSPS simultaneous sampling Analog-to-Digital A/D converter. The

Contextual Info: V7-5F17D8-289 Actual product appearance may vary. Potential Applications Features • • • • • • • • V7 Series Miniature Basic Switch, Single Pole Double Throw Circuitry, 3 A at 250 Vac, Simulated Roller Actuator, 0,08 N [0.3 oz] Maximum Operating

B1250T

Abstract: GR-1089-CORE TISP4145H3 TISP4145M3BJR-S
Contextual Info: ISDN SOLUTIONS Solution Products TISP4145M3BJR-S Objective Compliance Integrated Services Digital Network ISDN simultaneously transmits voice, video, and data over public switched telephone network circuits. This solution protects ISDN circuit interfaces against

THS4521

Abstract: ADS1271 ADS1274 ADS1278 OPA350 HTQFP64 hs 129
Contextual Info: ADS1274 ADS1278 SBAS367F – JUNE 2007 – REVISED FEBRUARY 2011 www.ti.com Quad/Octal, Simultaneous Sampling, 24-Bit Analog-to-Digital Converters Check for Samples: ADS1274, ADS1278 FEATURES DESCRIPTION • Simultaneously Measure Four/Eight Channels • Up to 144kSPS Data Rate

D0670

Abstract: AD7366 AD7366-5 AD7367 TMS320VC5506 EVAL-ad7367cbz
Contextual Info: True Bipolar Input, Dual 12-Bit/14-Bit, 2-Channel, Simultaneous Sampling SAR ADC AD7366/AD7367 FEATURES FUNCTIONAL BLOCK DIAGRAM DCAP A VDD Dual 12-bit/14-bit, 2-channel ADC True bipolar analog inputs Programmable input ranges: ±10 V, ±5 V, 0 V to 10 V ±12 V with 3 V external reference

LTC2903-1

Abstract: LTC2903-A1 LTC2903-B1 LTC2903-C1 LTC2903CS6-A1 LTC2903CS6-B1 LTC2903I-X1
Contextual Info: LTC2903-1 Precision Quad Supply Monitor in 6-Lead SOT-23 U FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO Ultralow Voltage Reset: VCC = 0.5V Guaranteed Monitor Four Inputs Simultaneously 3.3V, 2.5V, 1.8V, ADJ LTC2903-A1 5V, 3.3V, 2.5V, 1.8V (LTC2903-B1)

SGMS056D

Abstract: SMJ55161 "Video RAM" SMJ55161-75
Contextual Info: SMJ55161 262144 BY 16-BIT MULTIPORT VIDEO RAM SGMS056D – MAY 1995 – REVISED OCTOBER 1997 D D D D D D D D D D D D D D D Organization: – DRAM: 262 144 by 16 Bits – SAM: 256 by 16 Bits Dual-Port Accessibility – Simultaneous and Asynchronous Access From the DRAM and

CompactCellTM Static RAM

Contextual Info: PRELIMINARY Am45DL6408G Stacked Multi-Chip Package MCP Flash Memory and SRAM 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 8 Mbit (1 M x 8-Bit/512 K x 16-Bit) CompactCellTM Static RAM DISTINCTIVE CHARACTERISTICS

54ACTQ377

Abstract: E20A
Contextual Info: 54ACTQ377 Octal D Flip-Flop with Clock Enable General Description Features The ACTQ377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW.

"motor generator" current measurement

Abstract: GENERATOR AUTOMATIC VOLTAGE REGULATOR motor DC RF emission circuit diagram for automatic voltage regulator generator pwm automotive MOTOR CONTROL PWM controlled voltage regulator AS8410 SOIC16 Industrial DC Motor 61000-4-X
Contextual Info: Austria Mikro Systeme International AG AS8410 - A Novel PWM DC Motor Regulator Solution for Automotive and Industrial Applications 1. Key Features - - - Field proven DC motor regulator in Automotive industry Simultaneously achieving excellent EMC performance and better than 95 % power

SMJ55166

Abstract: SMJ55166-75 SMJ55166-80
Contextual Info: SMJ55166 262144 BY 16-BIT MULTIPORT VIDEO RAM SGMS057C – APRIL 1995 – REVISED JUNE 1997 D D D D D D D D D Organization: – DRAM: 262 144 Words x 16 Bits – SAM: 256 Words × 16 Bits Dual-Port Accessibility – Simultaneous and Asynchronous Access From the DRAM and

Contextual Info: Sipejc * SP8530 Corporation^ SIGNAL PROCESSIN G EXCELLENCE S2ADC - Simultaneous Sampling Analog to Digital Converter • Patented Simultaneous Sampling of 2 channels Patent # 5,638,072 ■ 12 Bit Resolution ■ Single +5Volt Supply ■ Internal Reference, 1.25V