SIF10 Search Results

DS33R41

Abstract: DS21455 DS21458 DS2155 DS33Z41
Contextual Info: DS33R41 Inverse-Multiplexing Ethernet Mapper with Quad Integrated T1/E1/J1 Transceivers www.maxim-ic.com GENERAL DESCRIPTION FEATURES 10/100 IEEE 802.3 Ethernet MAC MII and RMII Half/Full Duplex with Automatic Flow Control The DS33R41 extends a 10/100 Ethernet LAN

DS26504

Contextual Info: DESIGN KIT AVAILABLE DS26504 T1/E1/J1/64KCC BITS Element www.maxim-ic.com GENERAL DESCRIPTION The DS26504 is a building-integrated timing-supply BITS clock-recovery element. It also functions as a basic T1/E1 transceiver. The receiver portion can recover a clock from T1, E1, 64kHz composite clock

S1C17711

Abstract: DATA VISION LCD MODULE p34 T16A S1C17
Contextual Info: CMOS 16-BIT SINGLE CHIP MICROCONTROLLER S1C17711 Technical Manual Rev.1.0 NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability

S1C17564

Abstract: hx 630 S1C17 S1C17554 high power thyristor REGULATOR IC 7812 SMD
Contextual Info: CMOS 16-BIT SINGLE CHIP MICROCONTROLLER S1C17554/564 Technical Manual Rev.1.0 NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability

S1C17705

Abstract: S5U1C17001C S1C17
Contextual Info: CMOS 16-BIT SINGLE CHIP MICROCOMPUTER S1C17705 Technical Manual Rev.1.0 NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability

DS26521

Abstract: BTS 308 EC17 pinout of bel 187 transistor rspc 193 ec5 BBC FTL 3-2 G.SHDSL Industry Single-Chip DS2155 DS2156
Contextual Info: DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS33R11 extends a 10/100 Ethernet LAN segment by encapsulating MAC frames in HDLC or X.86 LAPS for transmission over a T1/E1/J1 data stream. §

RG703

Abstract: ch8c ch6b Motorola LSC microcontroller DS26528 DS26521 DS26522 DS26524 DS26524GN 1103h
Contextual Info: DS26524 Quad T1/E1/J1 Transceiver www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS26524 is a single-chip 4-port framer and line interface unit LIU combination for T1, E1, and J1 applications. Each channel is independently configurable, supporting both long-haul and short-haul

20EF TRANSFORMER

Abstract: TRANSFORMER 20EF 20F9 rexton AAIS mark csc 9102 D3318
Contextual Info: PRODUCT PREVIEW GENERAL DESCRIPTION The DS26519 is a single-chip 16-port framer and line interface unit LIU combination for T1, E1, and J1 applications. Each port is independently configurable, supporting both long-haul and short-haul lines. The DS26518 is a 8-port SCT. The DS26514 is a 4-port

11290

Abstract: TLS14
Contextual Info: DS26528 Octal T1/E1/J1 Transceiver www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS26528 is a single-chip 8-port framer and line interface unit LIU combination for T1, E1, and J1 applications. Each channel is independently configurable, supporting both long-haul and short-haul

G6003

Contextual Info: DS33R41 Inverse-Multiplexing Ethernet Mapper with Quad Integrated T1/E1/J1 Transceivers www.maxim-ic.com GENERAL DESCRIPTION FEATURES 10/100 IEEE 802.3 Ethernet MAC MII and RMII Half/Full Duplex with Automatic Flow Control The DS33R41 extends a 10/100 Ethernet LAN

IC 7106

Abstract: IC1 723 N13T1 I431 telcordia
Contextual Info: DEMO KIT AVAILABLE DS3100 Stratum 3/3E Timing Card IC www.maxim-ic.com GENERAL DESCRIPTION FEATURES When paired with an external TCXO or OCXO, the DS3100 is a complete central timing and synchronization solution for SONET/SDH network elements. With two multiprotocol BITS/SSU receivers

81c51

Abstract: 80C51SL 81C51SL 83C51SL 87C51SL 8XC51SL A814 272268 Kx Mouse
Contextual Info: 8XC51SL LOW VOLTAGE 8XC51SL KEYBOARD CONTROLLER 80C51SL 81C51SL CPU with RAM and I O VCC e 5V g 10% 16K ROM Preprogrammed with SystemSoft Keyboard Controller and Scanner Firmware VCC e 5V g 10% 83C51SL 16K Factory Programmed ROM VCC e 5V g 10% 87C51SL 16K OTP ROM VCC e 5V g 10%

DS2155

Abstract: DS2155G DS2155GN DS2155L DS2155LN TR54016
Contextual Info: DALLAS SEMICONDUCTOR PRELIMINARY DS2155 T1/E1/J1 Single Chip Transceiver SCT FEATURES • • • • • • • • • • • • • • • • • • Complete DS1/ISDN–PRI/J1 transceiver functionality Complete E1 (CEPT) PCM-30/ISDN-PRI transceiver functionality

ch7d

Contextual Info: DS26528 Octal T1/E1/J1 Transceiver www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS26528 is a single-chip 8-port framer and line interface unit LIU combination for T1, E1, and J1 applications. Each channel is independently configurable, supporting both long-haul and short-haul

TLS14

Contextual Info: DS26528 Octal T1/E1/J1 Transceiver www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS26528 is a single-chip 8-port framer and line interface unit LIU combination for T1, E1, and J1 applications. Each channel is independently configurable, supporting both long-haul and short-haul

Characteristics-100W

Contextual Info: DS26502 T1/E1/J1/64KCC BITS Element www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS26502 is a building-integrated timingsupply BITS clock-recovery element. The receiver portion can recover a clock from T1, E1, 64kHz composite clock, and 6312kHz synchronization timing interfaces. In T1 and E1

Contextual Info: DS26503 T1/E1/J1 BITS Element www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS26503 is a building-integrated timingsupply BITS clock-recovery element. It also functions as a basic T1/E1 transceiver. The receiver portion can recover a clock from T1, E1, and 6312kHz synchronization timing

Contextual Info: DESIGN KIT AVAILABLE DS26503 T1/E1/J1 BITS Element www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS26503 is a building-integrated timingsupply BITS clock-recovery element. It also functions as a basic T1/E1 transceiver. The receiver portion can recover a clock from T1,

Contextual Info: DS26519 16-Port T1/E1/J1 Transceiver www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS26519 is a single-chip 16-port framer and line interface unit LIU combination for T1, E1, and J1 applications. Each port is independently configurable, supporting both long-haul and short-haul lines. The

Contextual Info: DESIGN KIT AVAILABLE DS26502 T1/E1/J1/64KCC BITS Element www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS26502 is a building-integrated timingsupply BITS clock-recovery element. It also functions as a basic T1/E1 transceiver. The receiver portion can recover a clock from T1,

DS2155

Abstract: DS21Q55 DS21Q55N
Contextual Info: DS21Q55 Quad T1/E1/J1 Transceiver www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS21Q55 is a quad software-selectable T1, E1, or J1 MCM device for short-haul and long-haul applications. Each port is composed of a line interface unit LIU , framer, HDLC controllers, and a

dallas semiconductor IC DS 1242

Abstract: 063a st rcc23 RG703 BUS34 bel 1515 hybrid ic Motorola LSC microcontroller mps 0514 MPS 0713 P/LM 1709 cb
Contextual Info: DS26556 4-Port Cell/Packet Over T1/E1/J1 Transceiver www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS26556 is a quad, software-selectable T1, E1, or J1 transceiver with a cell/packet/TDM interface. It is composed of four framer/formatters + LIUs, and a UTOPIA cell , POS-PHY

star delta ladder diagram

Abstract: star delta FORWARD REVERSE STARTER star delta plc SIF10-M30N-C1-P0 RSLOGIX 500 LADDER star delta PS 307 2A abb motor delta plc COMMUNICATION WITH PC USING RS232 MFI21-FBP 1770 kfd rs232
Contextual Info: Software Description FBP FieldBusPlug V7 DeviceNet Bus Software Help for Programming an Allen Bradley Control System DeviceNet Bus V7 Software Description DeviceNet Software Help for Programming an Allen Bradley Control System Contents Page General Purpose . 4

keyboard interfacing with 8051

Abstract: keyboard matrix using 8051 IC 8042 Keyboard Controller IPL 5000 8051 keyboard application keyboard matrix a to d converter interface with 8051 intel 8042 keyboard controller PC/AT intel embedded microcontroller handbook keyboard controllers c code keyboard interfacing with controllers using c
Contextual Info: [^ © y O T [PlHiüSWDÖlW in t e i 80C51SL-BG KEYBOARD CONTROLLER • Superset of 80C51 Architecture ■ Complete 8042 Keyboard Controller Functionality ■ 8042-Style Host Interface ■ Optional Hardware Speed-Up of Gate A20 and RCL ■ Local 16 x 8 Keyboard Switch Matrix