SIEMENS PULSE SEQUENCE Search Results

5101P

Abstract: 5101p ram PSB8510-6 PSB RESISTORS 8510-1-P 8510-6-P siemens S 7- 400 MANUAL 4S500 PSB 697 P5101P
Contextual Info: b5E D • Û235b05 00520b? bbfi « S I E G SIEMENS SIEMENS AKTIENGESELLSCHAF Programmable Dialing Circuit PSB 8510-1-P;-1T PSB 8510-6-P;-6T Preliminary Data CMOS 1C Features Common Features • Advanced CMOS technology • Pulse PD and dual tone multi frequency (DTMF)

Contextual Info: SIEMENS S/T Bus Interface Circuit Extended 1 PEB 2081 Features • Full duplex 2B+D S/T-interface transceiver according to the following specifications: - ITU Recommendation 1.430 - ETS 300 012 - ANSI T1.605 • 192 kbit/s transmission rate • Pseudo-ternary coding with 100 % pulse width

Contextual Info: SIEMENS PEB 20320 Functional Description 2 Functional Description 2.1 Serial Interface The serial interface of MUNICH32 includes a data receive RDATA and a data transmit line (TDATA) as well as the accompanying control signals (RCLK = Receive Clock, RSP = Receive Synchronization Pulse, TCLK = Transmit Clock, TSP = Transmit

TSOP54-2

Contextual Info: HYB39S6440x/80x/16xAT L 64M B it Synchronous DRAM SIEMENS 64 MBit Synchronous DRAM Advanced Inform ation • High Performance: -8 -10 Units fCKmax. 125 100 MHz tCK3 8 10 ns tAC3 6 7 ns tCK2 10 12 ns tAC2 6 8 ns Multiple Burst Operation Automatic Command Programmable W rap Sequence: Sequential

Contextual Info: SIEMENS ICs for Communications Quad ISDN Echocancellation Circuit Analogue Front End Quad IEC AFE PEB 24902 Version 1.1 PEF 24902 Version 1.1 Data Sheet 5.96 PEB 24902 Revision History 5.96 P revious R eleases: 2.96 p. 21/22 PLL characteristics p. 24/25 Description of ADC and table 5, ADC

SIEMENS AVR

Abstract: SIEMENS AVR GENERATOR SDA9241 SDA9095 smd b3u 00M4
Contextual Info: SIEMENS AKTIENGESELLSCHAF 51E D • flS35bQS Q04MSSS 337 ■ SIEG -F 5 2 r3 3 > -O S SIEM EN S Memory Sync Controller SDA 9095 Preliminary Data CMOS 1C Type Ordering code Package SDA 9095 Q67100-H8383 PL-CC-44 As COMS 1C, the Memory Sync Controller MSC is part of the Feature Box with a memory

Contextual Info: SIEMENS ICs for Communications Quad ISDN Echocancellation Circuit Analogue Front End Quad IEC AFE PEB 24902 Version 1.1 PEF 24902 Version 1.1 Data Sheet 5.96 T2490-211-D2-7600 PEB 24902 Revision History 5.96 Previous R eleases: 2 .9 6 p. 2 1 /2 2 PLL characteristics

Contextual Info: 47E SIEM ENS D • 6¿35b05 SIEMENS 003M4G7 5 »SIEG AKTIENGESELLSCHAF T-nrvTkv, VCR Stereo Processor TDA 6620 Preliminary Data Bipolar 1C Features • • • • Inexpensive solution for VCR sets due to a low cost external writing Identification signal based on the PLL-principle

82C54-2-P

Contextual Info: 47E » m Ö235b05 0G321flfl S • SIEG SIEMENS AKTIENGESELLSCHAF Av* "T-S W ^ y $ t\ SAB 82C54 Programmable CMOS Interval Timer SAB 82C54 up to 8 MHz SAB 82C54-2 up to 10 MHz • C om patible w ith all Siemens and m ost other microprocessors • Six program m able counter modes

transistor smd qh

Abstract: transistor book SDA 30C162
Contextual Info: SIEMENS ICs for Consumer Electronics MEGATEXT and MEGATEXT PLUS ICs SDA 5273 / SDA 5275 SDA 5273-2 / SDA 5275-2 Data Sheet 1997-09-01 MEGATEXT and MEGATEXT PLUS ICs SDA 5273 / SDA 5275 SDA 5273-2 / SDA 5275-2 Revision History: 1997-09-01 Previous Releases:

siemens sda

Abstract: SDA 30C162
Contextual Info: MEGATEXT and MEGATEXT PLUS ICs SDA 5273 / SDA 5275 SDA 5273-2 / SDA 5275-2 Revision History: 06.97 Previous Releases: 11.96 Page Subjects changes since last revision 20 Now also covers SDA 5275-2 and SDA 5273-2 versions; Reset/chip initialization update

Contextual Info: SIEMENS Dala Sheet 04,97 C501 Data Sheet Revision History : 1997-04-01 Previous Releases : 11.92, 11.93, 08.94, 08.95, 10.96 Page previous version Page (new version) general C501G-1E OTP version included 4 5 5-7 11 8, 9, 10 4 5 5-7 11 8, 9, 10 13 14 13 14

SDA9060

Contextual Info: SIEMENS AKTIENG ESE LLSCHAF S1E ]> • fl23SbüS OOMMMbO Ô13 H S I E 6 SIEMENS 'T'52W7 Video D/A Processor SDA 9060 Preliminary Data MOS 1C Type Ordering code Package SDA 9060 Q 67100 -H 8381 P-D IP-28 Description of Functions and Applications In conjunction with the DM SD Digital M ulti-Standard Decoder and the RGB signal pro­

siemens sda

Contextual Info: SIEMENS ICs for Consumer Electronics MEGATEXT and MEGATEXT PLUS ICs SDA 5273 / SDA 5275 SDA 5273-2 / SDA 5275-2 Data Sheet 1997-09-01 MEGATEXT and MEGATEXT PLUS ICs SDA 5273 / SDA 5275 SDA 5273-2 / SDA 5275-2 Revision History: 1997-09-01 Previous Releases:

Contextual Info: SIEMENS SDE 2526 MOS 1C Nonvolatile Memory 2-Kbit E2PROM with I 2C Bus Interface with Extended Temperature Range Features • Word-organized reprogrammable nonvolatile memory in n-channel floating-gate technology E PROM • 256 X 8-bit organization • + 5 V supply voltage

3225 k275

Abstract: 4032 K275 VARISTOR k275 3225 VARISTOR k275 diode k275 4032 07 k275 varistor varistor s20 k320 cu3225 k275 varistor s10 k275 Siemens varistor family
Contextual Info: Contents Type Survey 5 8 General Technical Information 15 Selection Procedure 35 Application and Design Examples 51 Quality 79 SMD Varistors 89 Disk Varistors 115 Block Varistors Strap Varistors 161 167 PowerDisk Arrester Blocks 171 173 Derating Curves V/I Characteristics

EASY320

Abstract: siemens cpu 216 ADSQ GALI6V8 sfw 10,7 MHz MFL-260 S0828
Contextual Info: PEB 20320 SIEMENS Application Notes 5 Application Notes 5.1 Test Loops 5.1.1 Test Loop Definitions for the MUNICH32 Two basic types of test loops are provided by the MUNICH32, internal and external. Each of these types is further subdivided into channelwise and complete test loops thus

siemens master drive circuit diagram

Abstract: AKER Ah NL-2500 TD13 park 16068 siemens 7st
Contextual Info: SIEMENS Nonvolatile Memory 4-Kbit E2PROM with I2C Bus and Write Protection SDA 3546-5 MOS 1C Features • Word-organized programmable nonvolatile memory in n-channel floating-gate technology E2PROM • 512 x 8-bit organization • Supply voltage 5 V • Serial 2-line bus for data input and output (l2C Bus)

4032 K275

Abstract: 3225 k275 VARISTOR k275 VARISTOR k275 3225 3225 k50 varistor diode k275 4032 cu3225 k275 07 k275 varistor VARISTOR S14 K275 VARISTOR s07 K20
Contextual Info: Contents Type Survey 5 8 General Technical Information 15 Selection Procedure 35 Application and Design Examples 51 Quality 79 SMD Varistors 89 Disk Varistors 115 Block Varistors Strap Varistors 161 167 PowerDisk Arrester Blocks 171 173 Derating Curves V/I Characteristics

Contextual Info: SIEMENS CGY 96 GaAs MMIC • • • • • • Power amplifier for GSM class 4 phones 3.2 W 35dBm output power at 3.5 V Overall power added efficiency 50 % Fully integrated 3 stage amplifier Power ramp control Input matched to 50 ohms, simple output match

SIEMENS BSt L 45 100

Abstract: 0D4T
Contextual Info: bOE ] • flE3SbDS DD4T371 274 M S I E S SIEM ENS SIEMENS AKTIENGESELLSCHAF Nonvolatile Memory 1-Kbit E2PROM with I 2C Bus SDA 2516-2 Preliminary Data MOS IC Features • W ord-organized, reprogrammable nonvolatile memory in n-channel floating-gate technology E2PROM)

DIODE 1E6H

Abstract: 81C80 DIODE 1E9H SAE81C80-A siemens ad14 1E5H DIODE 1E8H 1ebh SAE81C80A
Contextual Info: SIEMENS SAE 81C80 A CMOS Dual-Port RAM CMOS IC Features • Processor interface with address and data bus plus signals ALE, WR, RD • 8051-, 8096-compatible timing • Memory capacity 504 bytes • All functions fully static excl. oscillator watchdog • Standby operation

Contextual Info: g iiK « mm h l j | b i t M *»»* a t i gMk E N 3 ICs for Communications Framing and Line Interface Component for PCM 30 and PCM 24 FALC-LH PEB 2255 Version 1.1 Preliminary Data Sheet 05.97 T2255-XV11-P1 -7600 PEB 2255 Revision History: Current Version: 05.97

e1414

Abstract: siemens master drive circuit diagram L1152B siemens sda
Contextual Info: SIEMENS Nonvolatile Memory 1-Kbit E2PROM with PC Bus Interface SDA 2516 MOSIC Features • Word-organized reprogrammable nonvolatile memory in n-channel floating-gate technology E2PROM • 128 x 8-bit organization • Supply voltage 5 V • Serial 2-line bus for data input and output (I2C Bus)