SI5330 DATA SHEET Search Results

si5330

Contextual Info: Si5330 1.8/2.5/3.3 V L O W J I TT E R, L OW S KE W C LO CK B UF F ER /L E V EL T RA NS L AT OR Features  Factory-programmed mux selects  Wide frequency range between 1 of 2 inputs and provides LVPECL, LVDS: 5 to 710 MHz multiple precision, low-skew

Si5330A-B00200-GM

Contextual Info: Si5330 1 . 8 / 2 . 5 / 3 . 3 V L O W - J I T T E R, L O W - S K EW C L O C K B U F F E R / L E V E L TR A N S L A T O R Features 18 OEB 19 CLK1A 17 20 CLK1B 16 21 VDDO1 15 22 VDDO2 CLK2A CLK2B GND GND RSVD_GND 6 7 VDD RSVD_GND 5 Functional Block Diagram 23

Si5330A-A00200-GM

Contextual Info: Si5330 1 . 8 / 2 . 5 / 3 . 3 V L O W - J I T T E R, L O W - S K EW C L O C K B U F F E R / L E V E L TR A N S L A T O R Features 18 OEB 19 CLK1A 17 20 CLK1B 16 21 VDDO1 VDDO2 CLK2A CLK2B GND GND RSVD_GND 7 VDD RSVD_GND 6 Functional Block Diagram 22 15 IN3

AN408

Abstract: SI5330A-a00200-gm SI5330F si5330 JESD78 Si5334 Si5338 SSTL-18 SI5330B-A00206-GM SI5330J-A00223-GM
Contextual Info: Si5330 1 . 8 / 2 . 5 / 3 . 3 V L O W J I T T E R, L O W S K E W C L O C K B U F F E R / L E V E L TR A N S L A T O R Features Functional Block Diagram OEB 18 CLK1B IN3 16 IN2 17 VDDO0 19 15 RSVD_GND 14 GND GND RSVD_GND RSVD_GND 13 PCI Express 2.0/3.0  Fibre Channel

FA-238 25.0000MB-C3

Abstract: C0402X7R100
Contextual Info: Si 5 3 3 8 - EVB Si5330/34/35/38 E VALUATION B OA RD U SER ’ S G UIDE Description EVB Features The Si5338-EVB is used for evaluating the Si5330/34/ 35/38 family of any-frequency, any-output clock generators and clock buffers.  Fully powered from a single USB port.

Contextual Info: AN739 E STIMATING C LOCK T REE J I T T E R 1. Introduction High speed, high performance timing applications often require a combination of XO/VCXOs, clock generators, clock buffers and jitter cleaning clocks to satisfy system timing requirements. Each component in the clock tree

Si5338

Abstract: AN428 C8051F301 Silabs Si5356 AN136 F301 Si5326 Si5368 Si5338-EVB
Contextual Info: AN428 J UMP S TART : I N - S YSTEM , F LA SH - B ASED P ROGRAMMING FOR S ILIC ON L ABS ’ T I MI N G P RODUCTS 1. Introduction Silicon Labs' timing products provide unparalleled performance, flexibility, and functionality, freeing designers to focus on other value-adding aspects of their designs. To take full advantage of the flexibility of these timing devices

SI5338A

Abstract: Si5338 si5338b si5338c Si5338CA00100-GM SI5338D SI5338J SI5338L
Contextual Info: Si5338 I 2 C - P ROGR AMMABLE A NY - R ATE , A N Y -O UTPUT Q UAD C LOCK G E N E R A T O R Features Applications CLK0B VDDO0 SDA 22 21 20 19 18 CLK1A IN2 2 17 CLK1B IN3 3 16 VDDO1 GND GND Pad IN4 4 15 VDDO2 IN5 5     Any-rate clock conversion MSAN/DSLAM/PON

Si5338C

Abstract: Si5338 AN562 JESD78 SSTL-18 UM10204 3G-SDI serializer Si5338A SDI SERIALIZER Si5338s
Contextual Info: Si5338 I 2 C - P R O GRA MM A B LE A NY - F R E Q U E N C Y, A NY - O UTPUT Q UAD C LOCK G ENERATOR Features Applications CLK0B VDDO0 SDA 22 21 20 19 18 CLK1A IN2 2 17 CLK1B IN3 3 16 VDDO1 GND GND Pad IN4 4 15 VDDO2 IN5 5      Any-frequency clock conversion

Phase Frequency detector

Abstract: Si5338
Contextual Info: Si5338 I 2 C - P R O GRA MM A B LE A NY - F R E Q U E N C Y, A NY - O UTPUT Q UAD C LOCK G ENERATOR Features Applications CLK0B VDDO0 SDA 22 21 20 19 18 CLK1A IN2 2 17 CLK1B IN3 3 16 VDDO1 GND GND Pad IN4 4 15 VDDO2 IN5 5      Any-frequency clock conversion

Si5338

Abstract: Si5338s Si5338-EVB si5330 SI5338C-AXXXXXGM Si5338X-A-GM
Contextual Info: Si5338 I 2 C - P R O GRA MM A B LE A NY - F R E Q U E N C Y, A NY - O UTPUT Q UAD C LOCK G ENERATOR Features Applications CLK0B VDDO0 SDA 22 21 20 19 18 CLK1A IN2 2 17 CLK1B IN3 3 16 VDDO1 GND GND Pad IN4 4 15 VDDO2 IN5 5      Any-frequency clock conversion

Contextual Info: Si5338 I 2 C - P R O GRA MM A B LE A NY - F R E Q U E N C Y, A NY - O UTPUT Q UAD C LOCK G ENERATOR Features Applications CLK0B VDDO0 SDA 22 21 20 19 18 CLK1A IN2 2 17 CLK1B IN3 3 16 VDDO1 GND GND Pad IN4 4 15 VDDO2 IN5 5      Any-frequency clock conversion

Si5338

Abstract: SI5338C-A-GM schematic diagram of a router
Contextual Info: Si5338 I 2 C - P R O GRA MM A B LE A NY - F R E Q U E N C Y, A NY - O UTPUT Q UAD C LOCK G ENERATOR Features Applications CLK0B VDDO0 SDA 22 21 20 19 18 CLK1A IN2 2 17 CLK1B IN3 3 16 VDDO1 GND GND Pad IN4 4 15 VDDO2 IN5 5      Any-frequency clock conversion

Si5338

Abstract: Si533x si5338b stk 282 STK 290 010 stk 2250 stk 282 270 BY165 si5330 data sheet AN408
Contextual Info: Si5338 I 2 C - P R O G R A M M A B LE A N Y - F R E Q U E N C Y, A N Y -O UTPU T Q U A D C L OC K G E N E R A T O R Features Applications CLK0B VDDO0 SDA 22 21 20 19 18 CLK1A IN2 2 17 CLK1B IN3 3 16 VDDO1 GND GND Pad IN4 4 15 VDDO2 IN5 5     Any-frequency clock conversion