SELF POWERED TIME COUNTER Search Results

Contextual Info: WEDPN16M64V-XBX 16Mx64 Synchronous DRAM Preliminary* FEATURES GENERAL DESCRIPTION n High Frequency = 100, 125MHz The 128MByte 1Gb SDRAM is a high-speed CMOS, dynamic random-access, memory using 4 chips containing 268,435,456 bits. Each chip is internally configured as a

Contextual Info: fJUN ì 1 1993 DALLAS SEMICONDUCTOR FEATURES DS1603 Elapsed Time Counter Module PIN ASSIGNMENT • Two 32 bit counters keep track of real tim e and elapsed tim e • Battery powered counter counts seconds from the tim e battery is attached until Vbat is less than 2.5 volts

XFORMER

Abstract: Cross Reference optocouplers "power sourcing equipment"
Contextual Info: TPS2383B www.ti.com SLUS565G – JULY 2003 – REVISED AUGUST 2005 OCTAL POWER SOURCEING EQUIPMENT FEATURES • • • • • • • • • • • • • • Compliant to Power Over Ethernet IEEE 802.3af Standard Two-Point 25-kΩ Resistor Discovery

fram programmer schematic

Abstract: slau101
Contextual Info: MSP430 Gang Programmer MSP-GANG430 User's Guide Literature Number: SLAU101Q March 2003 – Revised November 2011 2 SLAU101Q – March 2003 – Revised November 2011 Submit Documentation Feedback Copyright 2003–2011, Texas Instruments Incorporated Contents

MMA7340L

Abstract: MMA7340LR2 MMA7340LT
Contextual Info: Freescale Semiconductor Technical Data Document Number: MMA7340L Rev 0, 1/2007 ±3g - 12g Three Axis Low-g Micromachined Accelerometer MMA7340L The MMA7340L is a low power, low profile capacitive micromachined accelerometer featuring signal conditioning, a 1-pole low pass filter,

Contextual Info: iPEM 2.4Gb SDRAM-DDR AS4DDR32M72PBG1 32Mx72 DDR SDRAM iNTEGRATED Plastic Encapsulated Microcircuit FEATURES BENEFITS DDR SDRAM Data Rate = 200, 250, 266, 333Mbps Package: • 208 Plastic Ball Grid Array PBGA , 16 x 23mm-1.0mm pitch 2.5V ±0.2V core power supply

MT48LCM32B2P

Abstract: MT48LCM32B2 x32s
Contextual Info: 64Mb: x32 SDRAM Features SDR SDRAM MT48LC2M32B2 – 512K x 32 x 4 Banks Features Options Marking • Configuration – 2 Meg x 32 512K x 32 x 4 banks • Plastic package – OCPL1 – 86-pin TSOP II (400 mil) standard – 86-pin TSOP II (400 mil) Pb-free

cq met t5

Contextual Info: ISSI IS42S32200AL 512K Bits x 32 Bits x 4 Banks 64-MBIT Low Power SYNCHRONOUS DYNAMIC RAM FEATURES • Clock frequency: 125, 100 MHz • Fully synchronous; all signals referenced to a positive clock edge • Internal bank for hiding row access/precharge

K4S643232H

Contextual Info: SDRAM 64Mb H-die x32 CMOS SDRAM 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL Revision 1.0 November 2003 Samsung Electronics reserves the right to change products or specification without notice. -1- Rev. 1.0 November. 2003 SDRAM 64Mb H-die (x32)

Contextual Info: CMS4A16LAx–75Ex 128M 8Mx16 Low Power SDRAM Revision 0.5 May. 2007 Rev. 0.5, May. ‘07 CMS4A16LAx–75Ex Document Title 128M(8Mx16) Low Power SDRAM Revision History Revision No. History Draft date Remark Preliminary 0.0 Initial Draft Apr.25th, 2005 0.1

CMS3216LAF

Abstract: CMS3216LAG CMS3216LAH
Contextual Info: CMS3216LAx-75xx 32M 2Mx16 Low Power SDRAM Revision 0.2 January, 2007 Rev0.2, Jan. 2007 CMS3216LAx-75xx Document Title 32M(2Mx16) Low Power SDRAM Revision History Revision No. History Draft date Remark 0.0 Initial Draft Mar.3rd, 2005 Preliminary 0.1 Add H(Pb-Free & Halogen Free) descriptions

LIS302DL self test example

Abstract: LIS302DL c source DO13 DO14 DO15 LIS302DL LIS302DLTR
Contextual Info: LIS302DL MEMS motion sensor 3-axis - ±2g/±8g smart digital output “piccolo” accelerometer Preliminary Data Feature • 2.16V to 3.6V supply voltage ■ 1.8V compatible IOs ■ <1mW power consumption ■ ±2g/±8g dynamically selectable Full-Scale ■

mt48

Abstract: TSOP II 54 MT48LC16M4A2 P1111 tp 806
Contextual Info: 64Mb: x4, x8, x16 SDRAM Features SDR SDRAM MT48LC16M4A2 – 4 Meg x 4 x 4 Banks MT48LC8M8A2 – 2 Meg x 8 x 4 Banks MT48LC4M16A2 – 1 Meg x 16 x 4 Banks Features Options Marking • Configuration – 16 Meg x 4 4 Meg x 4 x 4 banks – 8 Meg x 8 (2 Meg x 8 x 4 banks)

Contextual Info: SDRAM AS4SD2M32 512K x 32 x 4 Banks 64-Mb PIN ASSIGNMENT (Top View) Synchronous SDRAM 86-Pin TSOPII FEATURES • Full Military temp (-55°C to 125°C) processing available • Configuration: 512K x 32 x 4 banks • Fully synchronous; all signals registered on positive

TOP SIDE MARKING OF MICRON ddr2

Abstract: 8M16 DDR266 DDR266A DDR266B DDR333 DDR400 MT46V16M8 MT46V32M4 MT46V8M16
Contextual Info: 128Mb: x4, x8, x16 DDR SDRAM Features Double Data Rate DDR SDRAM MT46V32M4 – 8 Meg x 4 x 4 banks MT46V16M8 – 4 Meg x 8 x 4 banks MT46V8M16 – 2 Meg x 16 x 4 banks For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/ddr2

Contextual Info: HY5S6B6D L/S F(P)-xE 4Banks x1M x 16bits Synchronous DRAM Document Title 4Bank x 1M x 16bits Synchronous DRAM Revision History Revision No. History Draft Date Remark 0.1 Initial Draft Sep. 2003 Preliminary 0.2 Append Super-Low Power Group to the Data-sheet

AS4SD16M16

Contextual Info: SDRAM AS4SD16M16 Austin Semiconductor, Inc. 256 MB: 16 Meg x 16 SDRAM PIN ASSIGNMENT Top View Synchronous DRAM Memory 54-Pin TSOP FEATURES • Full Military temp (-55°C to 125°C) processing available • Configuration: 16 Meg x 16 (4 Meg x 16 x 4 banks)

Contextual Info: SDRAM AS4SD16M16 DOCUMENT TITLE 36Mb Pipelined Sync SRAM Rev # 1.7 1.8 1.9 AS4SD16M16 Rev. 1.7 3/2/09 History Text update on pg 8 &34, AC Spec update Removed “Consult Factory” pg 1 Update Micross Information Release Date March 2009 Status Release March 2009

Contextual Info: SDRAM AS4SD8M16 128 Mb: 8 Meg x 16 SDRAM PIN ASSIGNMENT Top View Synchronous DRAM Memory 54-Pin TSOP FEATURES • • • • • • • • • • • • • • Full Military temp (-55°C to 125°C) processing available Copper lead frame option for enhanced reliability

AS4SD32M16

Contextual Info: SDRAM AS4SD32M16 512Mb: 32 Meg x 16 SDRAM PIN ASSIGNMENT Top View Synchronous DRAM Memory 54-Pin TSOP FEATURES • Full Military temp (-55°C to 125°C) processing available • Configuration: 32 Meg x 16 (8 Meg x 16 x 4 banks) • Fully synchronous; all signals registered on positive

Contextual Info: FMD8B16LBx–30Ax 256M 16Mx16 Low Power DDR SDRAM Revision 1.0 Jan. 2009 Rev. 1.0, Jan. ‘09 1 FMD8B16LBx–30Ax Document Title 256M(16Mx16) Low Power DDR SDRAM Revision History Revision No. History Draft date Remark Preliminary 0.0 Initial Draft Jan. 17th, 2008

Contextual Info: FMD4A32LCx–30A C x 128M(4Mx32) Low Power DDR SDRAM Revision 0.2 Jan. 2009 Rev. 0.2, Jan. ‘09 1 FMD4A32LCx–30A(C)x Document Title 128M(4Mx32) Low Power DDR SDRAM Revision History Revision No. History Draft date Remark 0.0 Initial Draft Jun. 27th, 2008

Contextual Info: FMD4A32LBx–37Ex 128M 4Mx32 Low Power DDR SDRAM Revision 0.7 Dec. 2008 Rev. 0.7, Dec. ‘08 1 FMD4A32LBx–37Ex Document Title 128M(4Mx32) Low Power DDR SDRAM Revision History Revision No. History Draft date Remark 0.0 Initial Draft Jun.13th, 2006 Preliminary

Contextual Info: FMD4A32LBx–37Cx 128M 4Mx32 Low Power DDR SDRAM Revision 0.1 Dec. 2008 Rev. 0.1, Dec. ‘08 1 FMD4A32LBx–37Cx Document Title 128M(4Mx32) Low Power DDR SDRAM Revision History Revision No. History Draft date Remark 0.0 Initial Draft May. 2nd, 2008 Preliminary