SCZA004 Search Results

constant time delay

Abstract: SN74ABT7819 SN74ACT7807 SCZA004A
Contextual Info: Metastability Performance of Clocked FIFOs First-In, First-Out Technology Chris Wellheuser Advanced System Logic – Semiconductor Group SCZA004A 1 IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor

SN74ABT7819

Abstract: SN74ACT7807 SCZA004A
Contextual Info: Metastability Performance of Clocked FIFOs First-In, First-Out Technology Chris Wellheuser Advanced System Logic – Semiconductor Group SCZA004A 1 IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor

SN74ABT7819

Abstract: SN74ACT7807 SCZA004A
Contextual Info: Metastability Performance of Clocked FIFOs First-In, First-Out Technology Chris Wellheuser Advanced System Logic – Semiconductor Group SCZA004A 1 IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor

Contextual Info: SN54ACT3641 1024 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SGBS309A - AUGUST 1995 - REVISED APRIL 1998 • Free-Running CLKA and CLKB Can Be Asynchronous or Coincident • Output-Ready and Almost-Empty Flags Synchronized by CLKB • Clocked FIFO Buffering Data From Port A

Contextual Info: SN54ACT3641 1024 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SGBS309A – AUGUST 1995 – REVISED APRIL 1998 D D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A to Port B Memory Size: 1024 × 36

IC51-1324-828

Abstract: SN74ABT3614
Contextual Info: SN74ABT3614 64 x 36 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY WITH BUS MATCHING AND BYTE SWAPPING SCBS126H – JUNE 1992 – REVISED APRIL 2000 D D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Two Independent 64 × 36 Clocked FIFOs

IC51-1324-828

Abstract: SN74ABT3613 SN74ABT3614
Contextual Info: SN74ABT3613 64 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY WITH BUS MATCHING AND BYTE SWAPPING SCBS128F – JULY 1992 – REVISED APRIL 1998 D D D D D D D Low-Power Advanced BiCMOS Technology Free-Running CLKA and CLKB Can Be Asynchronous or Coincident 64 × 36 FIFO Buffering Data From Port A to

abt3612-15

Abstract: IC51-1324-828 SN74ABT3612 ABT3612
Contextual Info: SN74ABT3612 64 x 36 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCBS129G – JULY 1992 – REVISED APRIL 1998 D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Two Independent 64 × 36 Clocked FIFOs Buffering Data in Opposite Directions

Contextual Info: SN74ABT3612 64 x 36 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCBS129G – JULY 1992 – REVISED APRIL 1998 D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Two Independent 64 × 36 Clocked FIFOs Buffering Data in Opposite Directions

SN74ACT3631

Abstract: SN74ACT3641 SN74ACT3651 SN74ALVC3631 SN74ALVC3641 SN74ALVC3651
Contextual Info: SN74ALVC3631, SN74ALVC3641, SN74ALVC3651 512 x 36, 1024 × 36, 2048 × 36 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES SDMS025B – OCTOBER 1999 – REVISED JUNE 2000 D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A

5962-9560801NXD

Abstract: SN54ACT3641
Contextual Info: SN54ACT3641 1024 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SGBS309A – AUGUST 1995 – REVISED APRIL 1998 D D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A to Port B Memory Size: 1024 × 36

Contextual Info: SN74ACT3651 2048 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS439D – JUNE 1994 – REVISED FEBRUARY 1999 D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A to Port B Synchronous Read-Retransmit Capability

Contextual Info: SN54ACT3641 1024 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SGBS309A – AUGUST 1995 – REVISED APRIL 1998 D D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A to Port B Memory Size: 1024 × 36

IC51-1324-828

Abstract: SN74ABT3611
Contextual Info: SN74ABT3611 64 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCBS127E – JULY 1992 – REVISED APRIL 1998 D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident 64 × 36 Clocked FIFO Buffering Data From Port A to Port B Mailbox-Bypass Register In Each Direction

IC51-1324-828

Abstract: SN74ACT3638 SN74ACT3638-15PCB SN74ACT3638-15PQ
Contextual Info: SN74ACT3638 512 x 32 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCAS228D – JUNE 1992 – REVISED APRIL 1998 D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Two Independent 512 × 32 Clocked FIFOs Buffering Data in Opposite Directions

Contextual Info: SN54ACT3641 1024 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SGBS309A – AUGUST 1995 – REVISED APRIL 1998 D D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A to Port B Memory Size: 1024 × 36

Contextual Info: SN74ACT3631 512 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS246G – AUGUST 1993 – REVISED APRIL 1998 D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A to Port B Synchronous Read-Retransmit Capability

Contextual Info: SN74ABT3614 64 x 36 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY WITH BUS MATCHING AND BYTE SWAPPING SCBS126H – JUNE 1992 – REVISED APRIL 2000 D D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Two Independent 64 × 36 Clocked FIFOs

5962-9560801NXD

Abstract: SN54ACT3641 SN74ACT3641 SNJ54ACT3641HFP
Contextual Info: SN54ACT3641 1024 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SGBS309A – AUGUST 1995 – REVISED APRIL 1998 D D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A to Port B Memory Size: 1024 × 36

IC51-1324-828

Abstract: SN74ACT3631 SN74ACT3641 SN74ACT3651
Contextual Info: SN74ACT3641 1024 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS338C – JANUARY 1994 – REVISED OCTOBER 1997 D D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A to Port B Memory Size: 1024 × 36

Contextual Info: SN54ACT3641 1024 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SGBS309A – AUGUST 1995 – REVISED APRIL 1998 D D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A to Port B Memory Size: 1024 × 36

Contextual Info: SN74ACT3651 2048 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS439D – JUNE 1994 – REVISED FEBRUARY 1999 D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A to Port B Synchronous Read-Retransmit Capability

Contextual Info: SN54ACT3641 1024 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SGBS309A – AUGUST 1995 – REVISED APRIL 1998 D D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A to Port B Memory Size: 1024 × 36

IC51-1324-828

Abstract: SN74ACT3631 SN74ACT3641 SN74ACT3651 SCZA004A
Contextual Info: SN74ACT3651 2048 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY S C A S 4 3 9 C -J U N E 1994 - REVISED A P R IL 1998 • ■ I I I • • • • Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A to Port B Synchronous Read-Retransmit Capability