SCLS404 Search Results

SN74LV161

Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4

Contextual Info: SN54LV161A, SN74LV161A 4-BIT SYNCHRONOUS BINARY COUNTERS SCLS404C – APRIL 1998 – REVISED JULY 2003 D D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC RCO QA QB QC QD ENT LOAD SN54LV161A . . . FK PACKAGE TOP VIEW A B NC

Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4

Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4

Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4

SN74LV161

Abstract: A115-A C101 SN54LV161A SN74LV161A
Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404D − APRIL 1998 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4

Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4

Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4

Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4

Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404E − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4 13

dallas 8820

Contextual Info: SN54LV161A, SN74LV161A 4-BIT SYNCHRONOUS BINARY COUNTERS SCLS404B – APRIL 1998 – REVISED DECEMBER 2000 D D D D D D D D description SN54LV161A . . . J OR W PACKAGE SN74LV161A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW CLR CLK A B C D ENP GND 1 16 2

A115-A

Abstract: C101 SN54LV161A SN74LV161A
Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4

A115-A

Abstract: C101 SN54LV161A SN74LV161A
Contextual Info: SN54LV161A, SN74LV161A 4-BIT SYNCHRONOUS BINARY COUNTERS SCLS404B – APRIL 1998 – REVISED DECEMBER 2000 D D D D D D D D description SN54LV161A . . . J OR W PACKAGE SN74LV161A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW CLR CLK A B C D ENP GND 1 16 2

Contextual Info: SN54LV161A, SN74LV161A 4-BIT SYNCHRONOUS BINARY COUNTERS SCLS404B – APRIL 1998 – REVISED DECEMBER 2000 D D D D D D D D description SN54LV161A . . . J OR W PACKAGE SN74LV161A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW CLR CLK A B C D ENP GND 1 16 2

Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 SN54LV161A . . . J OR W PACKAGE SN74LV161A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP (Output Ground Bounce)

Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404E − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4 13

A115-A

Abstract: C101 SN54LV161A SN74LV161A 74LV161A
Contextual Info: SN54LV161A, SN74LV161A 4-BIT SYNCHRONOUS BINARY COUNTERS SCLS404B – APRIL 1998 – REVISED DECEMBER 2000 D D D D D D D D description SN54LV161A . . . J OR W PACKAGE SN74LV161A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW CLR CLK A B C D ENP GND 1 16 2

Contextual Info: SN54LV161A, SN74LV161A 4-BIT SYNCHRONOUS BINARY COUNTERS SCLS404 – APRIL 1998 description The ’LV161A devices are 4-bit synchronous binary counters designed for 2-V to 5.5-V VCC operation. These synchronous, presettable counters feature an internal carry look-ahead for application in

Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4

A115-A

Abstract: C101 SN54LV161A SN74LV161A
Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4

CTRDIV16

Abstract: SN54LV161A SN74LV161A
Contextual Info: SN54LV161A, SN74LV161A 4-BIT SYNCHRONOUS BINARY COUNTERS SCLS404A – APRIL 1998 – REVISED MAY 2000 D D D D D D D description CLR CLK A B C D ENP GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC RCO QA QB QC QD ENT LOAD SN54LV161A . . . FK PACKAGE TOP VIEW

74LV161A

Abstract: A115-A C101 SN54LV161A SN74LV161A
Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404D − APRIL 1998 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4

A115-A

Abstract: C101 SN54LV161A SN74LV161A
Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4

A115-A

Abstract: C101 SN54LV161A SN74LV161A
Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4