SCLS191 Search Results

Contextual Info: SN54LV164, SN74LV164 8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS _ SCLS191B - FEBRUARY 1993 - R EVISED APRIL 1996 • E P IC Enhanced-Performance Implanted CMOS • • • • • 2-(X SN54LV164. j or w package . .^db.orpw package

SN54LV164

Contextual Info: SN54LV164, SN74LV164 8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS SCLS191B – FEBRUARY 1993 – REVISED APRIL 1996 D D D D D EPIC  Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)

SN54LV164

Abstract: SN74LV164 SN74LV164D SN74LV164DR SN74LV164PWLE
Contextual Info: SN54LV164, SN74LV164 8ĆBIT PARALLELĆOUT SERIAL SHIFT REGISTERS SCLS191B − FEBRUARY 1993 − REVISED APRIL 1996 D EPIC  Enhanced-Performance Implanted D D D D CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)

SN54LV164

Abstract: SN74LV164
Contextual Info: SN54LV164, SN74LV164 8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS SCLS191B – FEBRUARY 1993 – REVISED APRIL 1996 D D D D D EPIC  Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)

SN74LV164

Contextual Info: SN74LV164 8-BIT PARALLEL-OUT SERIAL SHIFT REGISTER SCLS191 A - FEBRUARY 1 9 9 3 - REVISED JULY 1995 • EPIC Enhanced-Performance Implanted CMOS 2-|x Process • Typical Vq lp (Output Ground Bounce) < 0.8 V at Vc c = 3.3 V, TA = 25°C • Typical Vq h v (Output Vqh Undershoot)

SN54LV164

Abstract: SN74LV164 SN74LV164D SN74LV164DR SN74LV164PWLE
Contextual Info: SN54LV164, SN74LV164 8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS SCLS191B – FEBRUARY 1993 – REVISED APRIL 1996 D D D D D EPIC  Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)

SN74ALVCH162245

Abstract: Schottky Barrier Diode Bus-Termination Array SN7400 CLOCKED SLLS210 SCAD001D TEXAS INSTRUMENTS SN7400 SERIES buffer SN74LVCC4245 sn74154 SDAD001C SN7497
Contextual Info: Section 4 Logic Selection Guide ABT – Advanced BiCMOS Technology . . . . . . . . . . . . . . . . . . . . . . . . . . 4–3 ABTE/ETL – Advanced BiCMOS Technology/ Enhanced Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–9

SN74HC02 Spice model

Abstract: philips semiconductor data handbook SDAD001C SDFD001B SCAD001D SN7497 spice model SN74AHC14 spice Transistor Crossreference SLLS210 ci ttl sn74ls00
Contextual Info: LOGIC OVERVIEW 1 FUNCTIONAL INDEX 2 FUNCTIONAL CROSSĆREFERENCE 3 DEVICE SELECTION GUIDE 4 3 LOGIC SELECTION GUIDE FIRST QUARTER 1997 IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest

SN74LV164

Contextual Info: SN74LV164 8-BIT PARALLEL-OUT SERIAL SHIFT REGISTER S C L S 1 91 - FEBR UARY 1993 - RE V IS E D M ARCH 1994 0, DB, OR PW PACKAGE TOP VIEW • EPIC (Enhanced-Performance Implanted CMOS) 2-jj. Process • Typical V q lp (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C