SCES241A Search Results

Contextual Info: SN74SSTL32877 26-BIT REGISTERED BUFFER WITH SSTL_2 INPUTS AND OUTPUTS DESIGN GOAL DESIGN GOAL SCES241A – APRIL 1999 – REVISED MAY 1999 D D D D D D Member of the Texas Instruments Widebus Family Supports SSTL_2 Signal Data Inputs and Outputs Supports LVTTL Switching Levels on the

SN74SSTL32877

Contextual Info: SN74SSTL32877 26-BIT REGISTERED BUFFER WITH SSTL_2 INPUTS AND OUTPUTS DESIGN GOAL DESIGN GOAL SCES241A – APRIL 1999 – REVISED MAY 1999 D Member of the Texas Instruments D D D D Differential CLK Signal D Meets SSTL_2 Class I and Class II Widebus Family

CMOS Data Book Texas Instruments Incorporated

Abstract: SN74ALB16244 SN74ALB16245 SN74ALVC00 SN74ALVC04 SN74ALVC08 SN74ALVC10 SN74ALVC125 SN74ALVC14 SN74ALVC32
Contextual Info: General Information ALVC Gates/Octals ALVC Widebus/Widebus+ ALVC Widebus With Series Damping Resistors ALVC Dual-Supply-Voltage Translators SSTL HSTL ALB Mechanical Data Output Derating Curves A ALVC Advanced Low-Voltage CMOS Data Book Including SSTL, HSTL, and ALB