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    SCC930 Search Results

    SCC930 Datasheets Context Search

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    C8450

    Abstract: 952100201 100203
    Contextual Info: T em ic see S em ico n d u cto rs SCC Reference List ESA/SCC Specifications SCC Number Features TEMIC Fart Number Package S C C 930I01501 85 ns 50 u A 2K x8 SR A M H M C -6 5 1 6 2 E S C C 930Ì01502 85 ns 5 0 p A 2Kx8 SR A M H M 4 -6 5 Í6 2 E LCC32 S C C 930101503


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    930i01501scc9301015lcc3265262e+54--65262eblcc44c8450952100201100203 PDF

    M6569

    Abstract: P883
    Contextual Info: M65697 256 K  1 Very Low Power CMOS SRAM Introduction The M65697 is a very low power CMOS static RAM organized as 262144 x 1 bit. It is manufactured using the TEMIC high performance CMOS technology named SCMOS. With this process, TEMIC is the first to bring the solution


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    m6569765697escc9301038m6569+1p883 PDF

    Contextual Info: Temic Semiconductors 8 K X 8 Very Low Power CMOS SRAM HM 65664A Introduction The HM 65664A is a very low power CMOS static RAM organized as 8192 x 8 bit. It is manufactured using the TEMIC high performance CMOS technology named super CMOS. With this process, TEMIC is the first to bring the solution


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    5664aagain55scc930102965664k PDF

    Contextual Info: Temic M65697 Semiconductors 256 K X 1 Very Low Power CMOS SRAM Introduction The M65697 is a very low power CMOS static RAM organized as 262144 x 1 bit. It is manufactured using the TEMIC high performance CMOS technology named SCMOS. With this process, TEMIC is the first to bring the solution


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    m6569700q7420 PDF

    P883

    Abstract: HM-65664AB hm65664a 65664ab HM-65664
    Contextual Info: HM 65664A 8 K  8 Very Low Power CMOS SRAM Introduction The HM 65664A is a very low power CMOS static RAM organized as 8192 x 8 bit. It is manufactured using the TEMIC high performance CMOS technology named super CMOS. current typical value = 0.1 µA with a fast access time at


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    5664a65664fscc9301029p883+4hm-65664abhm65664a65664abhm-65664 PDF

    M54HC164

    Abstract: M54HC164D M54HC164K M54HC164K1
    Contextual Info: M54HC164 RAD-HARD 8 BIT SIPO SHIFT REGISTER • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 62MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:


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    m54hc16462mhzscc-9306-041m54hc164d+2m54hc164km54hc164k1 PDF

    M67132

    Contextual Info: Temic Semiconductors 2 K x 8 CMOS Dual Port RAM M67132/M67142 Description The M67132/67142 are very low power CMOS dual port static RAMs organized as 2048 x 8. They are designed to be used as a stand-alone 8 bit dual port RAM or as a combination MASTER/SLAVE dual port for 16 bits or


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    m67132/m67142m67132/67142smd5962-87002scc9301033+1m67132 PDF

    Contextual Info: Tem ic M67132/M67142 Semi co n du ct o rs 2K x 8 CMOS Dual Port RAM Description T he M 67132/67142 are very low pow er CM O S dual port static R A M s organized as 2048 x 8. T hey are designed to be used as a stand-alone 8 bit dual port R A M or as a com bination M A STER /SLA V E dual port for 16 bits or


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    m67132/m67142d5962-8700267142escc930 PDF

    Mascot AS

    Abstract: MASCOT VRL
    Contextual Info: Tem ic M65697 Semiconductors 256 K X 1 Very Low Power CMOS SRAM Introduction The M65697 is a very low power CMOS static RAM organized as 262144 x 1 bit. It is manufactured using the TEMIC high performance CMOS technology named SCMOS. With this process, TEMIC is the first to bring the solution


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    m65697scc9301038mascot asmascot vrl PDF

    202A

    Contextual Info: Temic M67201A/M67202A S e m i c o n d u c t o r s 512 x 9 & 1 K x 9 CMOS ParaUel FIFO Introduction The M67201A/202A implement a first-in first-out algorithm, featuring asynchronous read/write operations. The FULL and EMPTY flags prevent data overflow and underflow. The Expansion logic allows unlimited


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    m67201a/m67202am67201a/202a202a PDF

    Contextual Info: Temic M67024 S e m i c o n d u c t o r s 4 K x 16 CMOS Dual Port RAM Introduction The M67024 is a very low power CMOS dual port static RAM organised as 4096 x 16. The M67024 is designed to be used as a stand-alone 16 bit dual port RAM or as a combination MASTER/SLAVE dual port for 32 bit or


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    m6702467024escc9301034 PDF

    M54HC165

    Abstract: M54HC165D M54HC165D1 M54HC165K M54HC165K1
    Contextual Info: M54HC165 RAD-HARD 8 BIT PISO SHIFT REGISTER • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 15ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:


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    m54hc165scc-9306-042m54hc165dm54hc165d1+2m54hc165km54hc165k1 PDF

    FP24-500

    Abstract: P883 HM65687A
    Contextual Info: HM65687A 64 K  1 Very Low Power CMOS SRAM Introduction The HM65687A is a very low power CMOS static RAM organized as 65536 x 1 bit. It is manufactured using the TEMIC high performance CMOS technology named super CMOS. current typical value = 0.1 µA with a fast access time at


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    hm65687a65687escc9301026fp24-500+1p883 PDF

    M54HC595

    Abstract: M54HC595D M54HC595K M54HC595K1 SCC-9306-051
    Contextual Info: M54HC595 RAD-HARD 8 BIT SHIFT REGISTER WITH OUTPUT LATCHES 3 STATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 59MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.)


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    m54hc59559mhzscc-9306-051m54hc595d+2m54hc595km54hc595k1 PDF

    Contextual Info: Tem ic M65656 Semiconductors 32 K X 8 Very Low Power CMOS SRAM Introduction The M65656 is a very low power CMOS static RAM organized as 32768 x 8 bits. It is manufactured using the TEMIC high performance CMOS technology named SCMOS. With this process, TEMIC is the first to bring the solution


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    m65656scc9301030 PDF

    Contextual Info: Temic M65656 Semiconductors 32 K X 8 Very Low Power CMOS SRAM Introduction The M65656 is a very low power CMOS static RAM organized as 32768 x 8 bits. It is manufactured using the TEMIC high performance CMOS technology named SCMOS. With this process, TEMIC is the first to bring the solution


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    m65656bfl45b PDF

    Contextual Info: Temic Semiconductors 2 K x 8 CMOS Dual Port RAM M67132/M67142 Description The M67132/67142 are very low power CMOS dual port static RAMs organized as 2048 x 8. They are designed to be used as a stand-alone 8 bit dual port RAM or as a combination MASTER/SLAVE dual port for 16 bits or


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    m67132/m67142m67132/67142scc930103367i32e PDF

    P883

    Abstract: M672
    Contextual Info: M67201A/M67202A 512  9 & 1 K  9 CMOS Parallel FIFO Introduction The M67201A/202A implement a first-in first-out algorithm, featuring asynchronous read/write operations. The FULL and EMPTY flags prevent data overflow and underflow. The Expansion logic allows unlimited


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    m67201a/m67202am67201a/202aaf953667202f+3scc9301032p883m672 PDF

    M54HC109

    Abstract: M54HC109D M54HC109D1 M54HC109K SCC-9306-048
    Contextual Info: M54HC109 RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 67MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:


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    m54hc10967mhzscc-9306-048m54hc109d+2m54hc109d1m54hc109k PDF

    TRANSISTOR B737

    Abstract: MD80C31 smd TRANSISTOR code marking 8K 67202FV PGA300 5962-8506401MQA ERC32SIM marking code RAD SMD Transistor npn ISO DIMENSIONAL certificate formats 67205E
    Contextual Info: Integrated Circuits for Aerospace and Defense Short Form 1998 16 June 1998 Publisher: TEMIC Semiconductors La Chantrerie BP 70602 44306 Nantes Cedex 03 FRANCE Fax: +33 2 40 18 19 60 E:mail nantes.marcom@temic.fr World Wide Web: http://www.temic.de 16 June 1998


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    transistor b737md80c31smd transistor code marking 8k67202fv+6pga3005962-8506401mqaerc32simmarking code rad smd transistor npniso dimensional certificate formats67205e PDF

    67132E

    Abstract: M67132
    Contextual Info: M67132/M67142 2 K  8 CMOS Dual Port RAM Description The M67132/67142 are very low power CMOS dual port static RAMs organized as 2048 x 8. They are designed to be used as a stand-alone 8 bit dual port RAM or as a combination MASTER/SLAVE dual port for 16 bits or


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    m67132/m67142m67132/67142smd596267142e+3scc930103367132em67132 PDF

    67024E

    Abstract: M67024 j-cerquad 84 100-PIN Shared resource arbitration
    Contextual Info: M67024 4 K  16 CMOS Dual Port RAM Introduction The M67024 is a very low power CMOS dual port static RAM organised as 4096 x 16. The M67024 is designed to be used as a stand-alone 16 bit dual port RAM or as a combination MASTER/SLAVE dual port for 32 bit or


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    m6702467024escc9301034j-cerquad 84+2100-pinshared resource arbitration PDF

    M65656

    Abstract: 65656 P883
    Contextual Info: M65656 32 K  8 Very Low Power CMOS SRAM Introduction The M65656 is a very low power CMOS static RAM organized as 32768 x 8 bits. It is manufactured using the TEMIC high performance CMOS technology named SCMOS. With this process, TEMIC is the first to bring the solution


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    m6565665656f/gscc930103065656+1p883 PDF

    RY 485 ESA

    Contextual Info: Temic HM65687A Semiconductors 64 K X 1 Very Low Power CMOS SRAM Introduction The HM65687A is a very low power CMOS static RAM organized as 65536 x 1 bit. It is manufactured using the TEMIC high performance CMOS technology named super CMOS. current typical value = 0.1 |iA with a fast access time at


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    hm65687asflbfl45bq0d74d3ry 485 esa PDF