SCBS051C Search Results

SN64BCT126AD

Abstract: SN64BCT126ADE4 SN64BCT126ADG4 SN64BCT126ADR SN64BCT126ADRE4 SN64BCT126ADRG4 SN64BCT126A
Contextual Info: SN64BCT126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCBS051C – AUGUST 1990 – REVISED JULY 1998 D State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers ESD Protection Exceeds 2000 V

SN64BCT126A

Abstract: SN64BCT126AD SN64BCT126ADR SN64BCT126AN SN64BCT126ANSR
Contextual Info: SN64BCT126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCBS051C – AUGUST 1990 – REVISED JULY 1998 D State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers ESD Protection Exceeds 2000 V

Contextual Info: SN64BCT126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCBS051C – AUGUST 1990 – REVISED JULY 1998 D State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers ESD Protection Exceeds 2000 V

Contextual Info: SN64BCT126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCBS051C – AUGUST 1990 – REVISED JULY 1998 D State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers ESD Protection Exceeds 2000 V

Contextual Info: SN64BCT126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCBS051C – AUGUST 1990 – REVISED JULY 1998 D State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers ESD Protection Exceeds 2000 V

SN64BCT126A

Abstract: SN64BCT126AD SN64BCT126ADE4 SN64BCT126ADR SN64BCT126ADRE4 SN64BCT126AN SN64BCT126ANE4
Contextual Info: SN64BCT126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCBS051C – AUGUST 1990 – REVISED JULY 1998 D State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers ESD Protection Exceeds 2000 V

Contextual Info: SN64BCT126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCBS051C – AUGUST 1990 – REVISED JULY 1998 D State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers ESD Protection Exceeds 2000 V

Contextual Info: SN64BCT126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCBS051C – AUGUST 1990 – REVISED JULY 1998 D State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers ESD Protection Exceeds 2000 V

Contextual Info: SN64BCT126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCBS051C – AUGUST 1990 – REVISED JULY 1998 D State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers ESD Protection Exceeds 2000 V

Contextual Info: SN64BCT126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCBS051C – AUGUST 1990 – REVISED JULY 1998 D State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers ESD Protection Exceeds 2000 V

SN64BCT126A

Contextual Info: SN64BCT126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCBS051C – AUGUST 1990 – REVISED JULY 1998 D State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers ESD Protection Exceeds 2000 V

Contextual Info: SN64BCT126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCBS051C – AUGUST 1990 – REVISED JULY 1998 D State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers ESD Protection Exceeds 2000 V

T126A

Contextual Info: SN64BCT126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCBS051C – AUGUST 1990 – REVISED JULY 1998 D State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers ESD Protection Exceeds 2000 V

Contextual Info: SN64BCT126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCBS051C – AUGUST 1990 – REVISED JULY 1998 D State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers ESD Protection Exceeds 2000 V

T flip flop IC

Abstract: pin designation for CD40110B IC 74LS series logic gates 3 input or gate FT 4013 d dual flip flop ic cmos 4011 CD4001* using NAND gates IC CD 4033 pin configuration Quad 2 input nand gate cd 4093 FT 4013 D flip flop 74HCT 4013 DATASHEET
Contextual Info: T H E W O R L D L E A D E R I N L O G I C P R O D U C T S Logic Selection Guide February 2000 1999 EEProduct News PRODUCTS OF THE YEAR AWARD New products for prototype design AVC Advanced Very-Low-Voltage CMOS Logic See Section 4 LOGIC OVERVIEW 1 FUNCTIONAL INDEX