SCAS532 Search Results

Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC

Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC

Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC

Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC11 . . . J OR W PACKAGE SN74AC11 . . . D, DB, N, NS, OR PW PACKAGE

Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC

SN54AC11

Abstract: SN74AC11 SN74AC11D SN74AC11DBR SN74AC11DR SN74AC11N SN74AC11NSR SN74AC11PW SN74AC11PWR
Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC

SN54AC11

Abstract: SN74AC11 SN74AC11D SN74AC11DBR SN74AC11DR SN74AC11N SN74AC11NSR SN74AC11PW SN74AC11PWR
Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC

Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC

Contextual Info: SN54AC11, SN74AC11 TRIPLE 3-INPUT POSITIVE-AND GATES SCAS532B - AUGUST 1995 - REVISED SEPTEMBER 1996 • E P IC Enhanced-Performance Implanted CMOS 1-p.m Process Package Options Include Plastic Small-Outllne (D), Shrink Small-Outllne (DB), and Thin Shrink Small-Outllne (PW)

SN74AC11NSR

Abstract: SN74AC11PW SN74AC11PWR SN54AC11 SN74AC11 SN74AC11D SN74AC11DBR SN74AC11DR SN74AC11N
Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC

Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC

Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC

SN54AC11

Abstract: SN74AC11 SN74AC11D SN74AC11DBR SN74AC11DR SN74AC11N SN74AC11NSR SN74AC11PW SN74AC11PWR
Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC

Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC

Contextual Info: SN54AC11, SN74AC11 TRIPLE 3-INPUT POSITIVE-AND GATES SCAS532B – AUGUST 1995 – REVISED SEPTEMBER 1996 D D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW)

SN74AC11

Abstract: 122B4 AC11 SN54AC11
Contextual Info: SN54AC11, SN74AC11 TRIPLE 3-INPUT POSITIVE-AND GATES SCAS532 - AUGUST 1995 EPIC Enhanced-Performance Implanted CMOS 1-|im Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK) and

Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC

Contextual Info: SN54AC11, SN74AC11 TRIPLE 3-INPUT POSITIVE-AND GATES SCAS532B – AUGUST 1995 – REVISED SEPTEMBER 1996 D D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW)

Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC

ac11

Abstract: SN54AC11 SN74AC11 SN74AC11D SN74AC11DBR SN74AC11DR SN74AC11N SN74AC11NSR SN74AC11PW SN74AC11PWR
Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC

Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC

Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC

AC11

Abstract: SN54AC11 SN74AC11
Contextual Info: SN54AC11, SN74AC11 TRIPLE 3-INPUT POSITIVE-AND GATES SCAS532B – AUGUST 1995 – REVISED SEPTEMBER 1996 D D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW)

SN54AC11

Abstract: SN74AC11 SN74AC11D SN74AC11DBR SN74AC11DR SN74AC11N SN74AC11NSR SN74AC11PW SN74AC11PWR
Contextual Info: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC