SCAS181 Search Results

D3979

Contextual Info: 74ACT11158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCAS181 - D3979, JANUARY 1992 - REVISED APRIL 1993 Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pln Vcc and GND Pin Configurations Minimize High-Speed Switching Noise

Contextual Info: 74ACT11158 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą ą SCAS181 − D3979, JANUARY 1992 − REVISED APRIL 1993 • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout

74ACT11158

Contextual Info: 74ACT11158 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą ą SCAS181 − D3979, JANUARY 1992 − REVISED APRIL 1993 • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout

Contextual Info: 74ACT11158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCAS181 -D 397 9. JANUARY 1992 - REVISED APRIL 1993 • * Inputs Are TTL-Voltage Compatible I I * Flow-Through Architecture Optimizes PCB Layout I | * Center-Pin Vcc and GND Pin Configurations

74ACT11158

Contextual Info: 74ACT11158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCAS181 – D3979, JANUARY 1992 – REVISED APRIL 1993 • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations

74ACT11158

Contextual Info: 74ACT11158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCAS181 – D3979, JANUARY 1992 – REVISED APRIL 1993 • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations

54ACT11158

Contextual Info: b3E D TEXAS INSTR LOGIC • GüTSM flH 3n B T H 3 54ACT11158,74ACT11158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS SCAS181-D 3979, JANUARY 1992 54ACT11158. . . J PACKAGE 74ACT11158. . . DW OR N PACKAGE (TOP VIEW) Inputs Are TTL-Voltage Compatible

Contextual Info: 74ACT11158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCAS181 – D3979, JANUARY 1992 – REVISED APRIL 1993 • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations

Contextual Info: SN74ACT7803 512x18 CLOCKED FIRST-IN, FIRST-OUT MEMORY S C A S 1 9 1 A -M A R C H 1991 - R EVISED JULY 1995 • Member of the Texas Instruments Wldebus Family • Free-Running Read and Write Clocks Can Be Asynchronous or Coincident • Read and Write Operations Synchronized