SCAS10 Search Results

d204d

Contextual Info: 74AC11377 OCTAL D-TYPE FLIP-FLOP WITH CLOCK ENABLE SCAS101 - D3420, FEBRUARY 1990 - REVISED APRIL 1993 i * Contains Eight D-Type Flip-Flops * Clock Enable Latched to Avoid False Clocking DW OR NT PACKAGE TOP VIEW * Applications Include: Buffer/Storage Registers, Shift Registers, Pattern

D3455

Contextual Info: 74ACT11191 SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTER SCAS106A- D3455, FEBRUARY 1990 - REVISED APRIL 1993 DW OR N PACKAGE TOP VIEW * Inputs Are TTL-Voltage Compatible * Single Down/Up Count Control Line * Look-Ahead Circuitry Enhances Speed of Cascaded Counters

SCAS05FF

Abstract: SCAS10FF SCAS15FF
Contextual Info: SUPERFAST RECOVERY 1 PHASE FULL WAVE BRIDGE RECTIFIERS January 16, 1998 1997 SEMTECH CORP. SCAS05FF SCAS10FF SCAS15FF TEL:805-498-2111 FAX:805-498-3804 WEB:http://www.semtech.com 652 MITCHELL ROAD NEWBURY PARK CA 91320 SUPERFAST RECOVERY 1 PHASE FULL WAVE BRIDGE RECTIFIERS

74AC11191

Abstract: CTRDIV16
Contextual Info: 74AC11191 SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTER SCAS105A – FEBRUARY 1990 – REVISED APRIL 1993 • • • • • • • • • DW OR N PACKAGE Single Down/Up Count Control Line TOP VIEW Look-Ahead Circuitry Enhances Speed of Cascaded Counters Fully Synchronous in Count Modes

Contextual Info: 74AC11379 QUAD D-TYPE FLIP-FLOP WITH CLOCK ENABLE SCAS104 − MARCH 1990 − REVISED APRIL 1993 • • • • • • • • DW OR N PACKAGE TOP VIEW Contains Four Flip-Flops with Double-Rail Outputs Clock Enable Latched to Avoid False Clocking Applications Include: Buffer/Storage

Contextual Info: CDC208 DUAL 1ĆLINE TO 4ĆLINE CLOCK DRIVER WITH 3ĆSTATE OUTPUTS ąą SCAS109F − APRIL 1990 − REVISED OCTOBER 1998 D Low-Skew Propagation Delay D D D D D D DW PACKAGE TOP VIEW Specifications for Clock-Driver Applications TTL-Compatible Inputs and CMOS-Compatible Outputs

Contextual Info: CDC208 DUAL 1-LINE TO 4-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS109F – APRIL 1990 – REVISED OCTOBER 1998 D D D D D D D DW PACKAGE TOP VIEW Low-Skew Propagation Delay Specifications for Clock-Driver Applications TTL-Compatible Inputs and CMOS-Compatible Outputs

Contextual Info: CDC208 DUAL 1ĆLINE TO 4ĆLINE CLOCK DRIVER WITH 3ĆSTATE OUTPUTS ąą SCAS109F − APRIL 1990 − REVISED OCTOBER 1998 D Low-Skew Propagation Delay D D D D D D DW PACKAGE TOP VIEW Specifications for Clock-Driver Applications TTL-Compatible Inputs and CMOS-Compatible Outputs

CDC209

Abstract: CDC209-7 MS-001 MS-013
Contextual Info: CDC209, CDC209–7 DUAL 1-LINE TO 4-LINE CLOCK DRIVERS WITH 3-STATE OUTPUTS SCAS108D – MARCH 1990 – REVISED MAY 1997 D D D D D D D D D D DW OR N PACKAGE TOP VIEW CDC209 Replaces 74AC11208 CDC209-7 Replaces 74AC11208-7 Low-Skew Propagation Delay Specifications for Clock-Driver

Contextual Info: 74AC11377 OCTAL DĆTYPE FLIPĆFLOP WITH CLOCK ENABLE ą SCAS101 − D3420, FEBRUARY 1990 − REVISED APRIL 1993 • • • • • • • • DW OR NT PACKAGE TOP VIEW Contains Eight D-Type Flip-Flops Clock Enable Latched to Avoid False Clocking Applications Include: Buffer/Storage

CDC209

Abstract: CDC209-7
Contextual Info: CDC209, CDC209–7 DUAL 1-LINE TO 4-LINE CLOCK DRIVERS WITH 3-STATE OUTPUTS SCAS108C – MARCH 1990 – REVISED MARCH 1994 D D D D D D D D D D DW OR N PACKAGE TOP VIEW CDC209 Replaces 74AC11208 CDC209-7 Replaces 74AC11208-7 Low-Skew Propagation Delay Specifications for Clock-Driver

D-3420

Contextual Info: 74AC11377 OCTAL DĆTYPE FLIPĆFLOP WITH CLOCK ENABLE ą SCAS101 − D3420, FEBRUARY 1990 − REVISED APRIL 1993 • • • • • • • • DW OR NT PACKAGE TOP VIEW Contains Eight D-Type Flip-Flops Clock Enable Latched to Avoid False Clocking Applications Include: Buffer/Storage

Contextual Info: CDC208 DUAL 1ĆLINE TO 4ĆLINE CLOCK DRIVER WITH 3ĆSTATE OUTPUTS ąą SCAS109F − APRIL 1990 − REVISED OCTOBER 1998 D Low-Skew Propagation Delay D D D D D D DW PACKAGE TOP VIEW Specifications for Clock-Driver Applications TTL-Compatible Inputs and CMOS-Compatible Outputs

74ACT11191

Abstract: CTRDIV16
Contextual Info: 74ACT11191 SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTER SCAS106A – D3455, FEBRUARY 1990 – REVISED APRIL 1993 • • • • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Single Down/Up Count Control Line Look-Ahead Circuitry Enhances Speed of

Contextual Info: 74ACT11379 QUAD DĆTYPE FLIPĆFLOP WITH CLOCK ENABLE SCAS103 − JANUARY 1990 − REVISED APRIL 1993 • • • • • • • • • DW OR N PACKAGE Inputs Are TTL-Voltage Compatible Contains Four Flip-Flops with Double-Rail Outputs Clock Enable Latched to Avoid False

Contextual Info: 74AC11377 OCTAL DĆTYPE FLIPĆFLOP WITH CLOCK ENABLE ą SCAS101 − D3420, FEBRUARY 1990 − REVISED APRIL 1993 • • • • • • • • DW OR NT PACKAGE TOP VIEW Contains Eight D-Type Flip-Flops Clock Enable Latched to Avoid False Clocking Applications Include: Buffer/Storage

Contextual Info: CDC209, CDC209-7 DUAL 1-LINE TO 4-LINE CLOCK DRIVERS WITH 3-STATE OUTPUTS SCAS10 8 C - MARCH 1990 - REVISED MARCH 1994 DW OR N PACKAGE TOP VIEW • CDC209 Replaces 74AC11208 • CDC209-7 Replaces 74AC11208-7 • Low-Skew Propagation Delay Specifications for Clock-Drlver

Contextual Info: 74ACT11379 QUAD D-TYPE FLIP-FLOP WITH CLOCK ENABLE SCAS103 – JANUARY 1990 – REVISED APRIL 1993 • • • • • • • • • DW OR N PACKAGE Inputs Are TTL-Voltage Compatible Contains Four Flip-Flops with Double-Rail Outputs Clock Enable Latched to Avoid False

74ACT11379

Abstract: 74ACT11379DW 74ACT11379N
Contextual Info: 74ACT11379 QUAD D-TYPE FLIP-FLOP WITH CLOCK ENABLE SCAS103 – JANUARY 1990 – REVISED APRIL 1993 • • • • • • • • • DW OR N PACKAGE Inputs Are TTL-Voltage Compatible Contains Four Flip-Flops with Double-Rail Outputs Clock Enable Latched to Avoid False

QCD13

Contextual Info: 74ACT11191 SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTER SCAS106A – D3455, FEBRUARY 1990 – REVISED APRIL 1993 • • • • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Single Down/Up Count Control Line Look-Ahead Circuitry Enhances Speed of

Contextual Info: 74ACT11379 QUAD DĆTYPE FLIPĆFLOP WITH CLOCK ENABLE SCAS103 − JANUARY 1990 − REVISED APRIL 1993 • • • • • • • • • DW OR N PACKAGE Inputs Are TTL-Voltage Compatible Contains Four Flip-Flops with Double-Rail Outputs Clock Enable Latched to Avoid False

Contextual Info: 74AC11379 QUAD D-TYPE FLIP-FLOP WITH CLOCK ENABLE SCAS104 − MARCH 1990 − REVISED APRIL 1993 • • • • • • • • DW OR N PACKAGE TOP VIEW Contains Four Flip-Flops with Double-Rail Outputs Clock Enable Latched to Avoid False Clocking Applications Include: Buffer/Storage

Contextual Info: 74AC11379 QUAD D–TYPE FLIP–FLOP WITH CLOCK ENABLE SCAS104 – MARCH 1990 – REVISED APRIL 1993 • • • • • • • • DW OR N PACKAGE TOP VIEW Contains Four Flip-Flops with Double-Rail Outputs Clock Enable Latched to Avoid False Clocking Applications Include: Buffer/Storage

CDC208

Abstract: CDC208DBLE CDC208DW CDC208DWG4 CDC208DWR CDC208DWRG4 CDC208N MS-013
Contextual Info: CDC208 DUAL 1ĆLINE TO 4ĆLINE CLOCK DRIVER WITH 3ĆSTATE OUTPUTS ąą SCAS109F − APRIL 1990 − REVISED OCTOBER 1998 D Low-Skew Propagation Delay D D D D D D DW PACKAGE TOP VIEW Specifications for Clock-Driver Applications TTL-Compatible Inputs and CMOS-Compatible Outputs