SBWA Search Results

Contextual Info: 34.5 TO 35.5 GHz LOW-NOISE RECEIVER FRONT END MODEL: SBWA3435N01R FEATURES • • • • RF/LO coverage . IF operation . Conversion gain . Image rejection . 34.5 to 35.5 GHz 20 to 200 MHz

A65H73361

Abstract: A65H83181 SA10 SA11 SA12 SA13 SA15
Contextual Info: A65H73361/A65H83181 Series 128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output Preliminary Document Title 128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output Revision History Rev. No. 2.0 PRELIMINARY

IBM0418A41NLAB

Abstract: IBM0418A81NLAB IBM0436A41NLAB IBM0436A81NLAB
Contextual Info: IBM0436A41NLAB IBM0418A41NLAB IBM0418A81NLAB IBM0436A81NLAB 8Mb 256Kx36 & 512Kx18 and 4Mb (128Kx36 & 256Kx18) SRAM . Features • 8Mb: 256K x 36 or 512K x 18 organizations 4Mb: 128K x 36 or 256K x 18 organizations • Registered outputs • 30 Ω drivers

IBM0418A8ACLAB

Abstract: IBM0436A4ACLAB IBM0436A8ACLAB IBM0418A4ACLAB
Contextual Info: . IBM0418A4ACLAB IBM0436A8ACLAB Preliminary IBM0418A8ACLAB IBM0436A4ACLAB 8Mb 256Kx36 & 512Kx18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 8Mb: 256K x 36 or 512K x 18 organizations 4Mb: 128K x 36 or 256K x 18 organizations • 0.25 Micron CMOS technology

IBM0418A11NLAA

Abstract: IBM0436A11NLAA
Contextual Info: . Preliminary IBM0436A11NLAA IBM0418A11NLAA 32Kx36 & 64Kx18 SRAM Features • 32Kx36 or 64Kx18 organizations • Registered Outputs • 0.25 Micron CMOS technology • 30 Ohm Drivers • Synchronous Pipeline Mode of Operation with Self-Timed Late Write • Common I/O

IBM0418A4ANLAB

Abstract: IBM0418A8ANLAB IBM0436A4ANLAB IBM0436A8ANLAB
Contextual Info: . Preliminary IBM0418A4ANLAB IBM0418A8ANLAB IBM0436A8ANLAB IBM0436A4ANLAB 8Mb 256Kx36 & 512Kx18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 8Mb: 256K x 36 or 512K x 18 organizations 4Mb: 128K x 36 or 256K x 18 organizations • 0.25µ CMOS technology • Synchronous Register-Latch Mode of Operation

IBM0418A41XLAB

Abstract: IBM0418A81XLAB IBM0436A41XLAB IBM0436A81XLAB
Contextual Info: . Preliminary IBM0418A81XLAB IBM0436A81XLAB IBM0418A41XLAB IBM0436A41XLAB 8Mb 256Kx36 & 512Kx18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 8Mb: 256K x 36 or 512K x 18 organizations 4Mb: 128K x 36 or 256K x 18 organizations • 0.25 Micron CMOS technology

Contextual Info: IBM041841QLAD IBM043641QLAD P relim inary 128K x 36 & 256K x 18 SRAM Features • 128K x 36 or 256K x 18 Organizations • Registered Outputs • CMOS Technology • Common I/O • Synchronous Pipeline Mode Of Operation with Self-Timed Late Write • Asynchronous Output Enable and Power Down

Contextual Info: IBM041841RLAD IBM043641RLAD Preliminary 128K x 36 & 256K x 18 SRAM Features • 128K x 36 or 256K x 18 Organizations • Registered Addresses, W rite Enables, Synchro­ nous Select and Data Ins • CMOS Technology • Synchronous Pipeline Mode Of Operation with

Contextual Info: IBM04184ARLAA IBM04364ARLAA Preliminary 128K X 36 & 256K X 18 SRAM Features • 128K x 36 or 256K x 18 Organizations • Latched Outputs • 0.4 Micron CMOS Technology • Asynchronous Output Enable and Power Down Inputs • Synchronous Register-Latch Mode Of Opera­

Contextual Info: IBM041841RLAA IBM043641RLAA Preliminary 128K X 36 & 256K X 18 SRAM Features • 128K x 36 or 256K x 18 Organizations • Registered Outputs • CMOS Technolgy • Asynchronous Output Enable and Power Down Inputs • Synchronous Pipeline Mode Of Operation with

Contextual Info: I = = = = •= Preliminary IBM0418A81QLAA IBM0418A41 QLAA IBM0436A81QLAA IBM0436A41QLAA 8Mb 256Kx36 & 512x18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 256K x 36 or 512K x 18 organizations • Registered Outputs • 128K x 36 or 256K x 18 organizations

43bh

Abstract: marking code 42ae marking JC 6f diode CXK77P18E160GB CXK77P36E160GB CXK77P36E160GB-4AE CXK77P36E160GB-4E 43AF marking 43AF
Contextual Info: SONY CXK77P36E160GB / CXK77P18E160GB 16Mb LW R-L HSTL High Speed Synchronous SRAMs 512K x 36 or 1M x 18 8Mb LW R-L w/ EC HSTL High Speed Synchronous SRAMs (256K x 36 or 512K x 18) 4/42/43/44 Preliminary Description The CXK77P36E160GB (organized as 524,288 words by 36 bits) and the CXK77P18E160GB (organized as 1,048,576 words

CXK77L18R160GB-3

Abstract: CXK77L18R160GB-33 CXK77L18R160GB-4
Contextual Info: SONY CXK77L18R160GB 16Mb LW R-R HSTL High Speed Synchronous SRAM 1M x 18 3/33/4 Preliminary Description The CXK77L18R160GB is a high speed CMOS synchronous static RAM with common I/O pins, organized as 1,048,576 words by 18 bits. This synchronous SRAM integrates input registers, high speed RAM, output registers, and a one-deep write buffer

Contextual Info: IBM04181ARLAB IBM04361ARLAB Prelim inary 3 2 K X 36 & 6 4 K X 1 8 S R A M Features • 32K x 36 or 64K x 18 O rganizations • Latched O utputs • 0.5 M icron C M O S Technology • A synchronous O utput Enable and Power Down Inputs • S ynchronous R egister-Latch M ode of O p era ­

Contextual Info: I =¥= =• = Preliminary IBM04184AQLAB IBM04364AQLAB 128K X 36 & 256K X 18 SRAM Features • 128K x 36 or 256K x 18 Organizations Common I/O • 0.4 micron CMOS Technology Asynchronous Output Enable and Power Down Inputs • Synchronous Register Latch Mode Of Opera­

Contextual Info: IBM04184BSRLAA Prelim in a ry 2 5 6 K X 18 S W S R A M F ea tu r es • 256K x 18 Organizations • Registered Outputs • CMOS Technolgy • Asynchronous Output Enable and Power Down Inputs • Synchronous Pipeline Mode Of Operation with Standard Write • Boundary Scan using limited set ot JTAG 1149.1

SA82A

Abstract: IBM043610ULAB4M SA73A
Contextual Info: IBM043610ULAB4M x 1612/10, 3.3VMMDM15DSU-021044922. Preliminary IBM041810ULAB IBM043610ULAB 32K X 36 & 64K X 18 SRAM Features • 32K x 36 or 64K x 18 Organizations • 0.45 Micron CMOS Technology • Synchronous Flow Thru Mode of Operation with Self-Timed Late Write

octal tri state buffer ic

Abstract: CXK77B1840AGB CXK77B3640AGB SA10 SA11 SA12 SA14 2N218 369 42 sony
Contextual Info: SONY CXK77B3640AGB / CXK77B1840AGB 4Mb Late Write HSTL High Speed Synchronous SRAMs 128K x 36 or 256K x 18 Organization 37/38/4/45 Preliminary Description The CXK77B3640A (organized as 131,072 words by 36 bits) and the CXK77B1840A (organized as 262,144 words by 18 bits)

CXK77Q18B80AGB

Abstract: CXK77Q36B80AGB CXK77Q36B80AGB-28 CXK77Q36B80AGB-33
Contextual Info: SONY CXK77Q36B80AGB / CXK77Q18B80AGB 28/33/37/4 8Mb LW R-R HSTL High Speed Synchronous SRAMs 256K x 36 or 512K x 18 Preliminary Description The CXK77Q36B80AGB (organized as 262,144 words by 36 bits) and the CXK77Q18B80AGB (organized as 524,288 words by 18 bits) are high speed CMOS synchronous static RAMs with common I/O pins. These synchronous SRAMs integrate input

IBM041841RLAD7

Abstract: IBM043641rLAD SA10 SA11 SA13 SA14 SA16 35 x 35 PBGA, 580 100 balls 4k sram
Contextual Info: . Preliminary IBM041841RLAD IBM043641RLAD 128K x 36 & 256K x 18 SRAM Features • 128K x 36 or 256K x 18 Organizations • CMOS Technology • Synchronous Pipeline Mode Of Operation with Self-Timed Late Write • Single Differential PECL Clocks compatible with

IBM043641WLAD-4

Abstract: IBM043641WLAD IBM043641WLAD3P IBM043641WLAD3 IBM043641WLAD-3P IBM043641WLA SA10 SA11 SA13 SA16
Contextual Info: . Preliminary IBM041841WLAD IBM043641WLAD 128K x 36 & 256K x 18 SRAM Features • 128K x 36 or 256K x 18 Organizations • CMOS Technology • Synchronous Pipeline Mode Of Operation with Self-Timed Late Write • Single Ended Pseudo-PECL Clock compatible with LVTTL Levels

SA73A

Contextual Info: . Preliminary IBM043611RLAB IBM041811RLAB 32K X 36 & 64K X 18 SRAM Features • 32K x 36 or 64K x 18 Organizations • Registered Outputs • 0.5 Micron CMOS Technology • Asynchronous Output Enable and Power Down Inputs • Synchronous Pipeline Mode Of Operation with

Contextual Info: SONY CXK77B3640GB 4A/4/45A/45 4Mb Late Write HSTL High Speed Synchronous SRAM 128K x 36 Organization Description T he C X K 77B 3640 is a high speed BiCM O S synchronous static R A M w ith com m on I/O pins, organized as 131,072-w ords by 36-bits. This synchronous SR A M integrates input registers, high speed R A M , output registers/latches, and a one-deep write