SA00350 Search Results

74LVT

Abstract: 74LVT20 74LVT20PW
Contextual Info: INTEGRATED CIRCUITS 74LVT20 3.3V Dual 4-input NAND gate Product specification IC24 Data Handbook Philips Semiconductors 1996 Aug 28 Philips Semiconductors Product specification 3.3V Dual 4-input NAND gate 74LVT20 QUICK REFERENCE DATA SYMBOL LOGIC DIAGRAM CONDITIONS

DNA SMD MARKING CODE

Contextual Info: INTEGRATED CIRCUITS 74LVT20 3.3V Dual 4-input NAND gate Product specification IC24 Data Handbook Philips Semiconductors 1996 Aug 28 Philips Semiconductors Product specification 3.3V Dual 4-input NAND gate 74LVT20 QUICK REFERENCE DATA SYMBOL LOGIC DIAGRAM CONDITIONS

Contextual Info: Philips Semiconductors Product specification 3.3V Dual 4-input NAND gate 74LVT20 QUICK REFERENCE DATA LOGIC DIAGRAM CONDITIONS T,mb = 25“C; G N D =0V SYMBOL PARAMETER 'P L H Propagation delay An, Bn, Cn, Dn to Yn CL = 50pF; Vcc = 3.3V C IN Input Capacitance

SOT108-1

Abstract: Philips Semiconductors 74ABT 74ABT20 74ABT20PW
Contextual Info: INTEGRATED CIRCUITS 74ABT20 Dual 4-input NAND gate Product specification IC23 Data Handbook Philips Semiconductors 1995 Sep 22 Philips Semiconductors Product specification Dual 4-input NAND gate 74ABT20 QUICK REFERENCE DATA SYMBOL tPLH tPHL LOGIC DIAGRAM CONDITIONS

74ABT

Abstract: 74ABT20 74ABT20PW
Contextual Info: Philips Semiconductors Product specification Dual 4-input NAND gate 74ABT20 QUICK REFERENCE DATA SYMBOL tPLH tPHL LOGIC DIAGRAM CONDITIONS Tamb = 25°C; GND = 0V PARAMETER Propagation delay An, Bn, Cn, Dn to Yn TYPICAL A0 B0 CL = 50pF; VCC = 5V tOSLH tOSHL

74LVT20

Abstract: 74LVT20D 74LVT20PW
Contextual Info: Philips Semiconductors Product specification 3.3V Dual 4-input NAND gate 74LVT20 QUICK REFERENCE DATA CONDITIONS Tamb = 25°C; GND = OV PARAMETER SYMBOL LOGIC DIAGRAM tPLH tpHL Propagation delay An, Bn, Cn, Dn to Yn CL = 50pF; VCC = 3.3V C|N Input capacitance

SA00350

Contextual Info: Philips Semiconductors Product specification Dual 4-input NAND gate 74ABT20 QUICK REFERENCE DATA SYMBOL PARAMETER *PLH tpHL Propagation delay An, Bn, Cn, Dn to Yn LOGIC DIAGRAM CONDITIONS T.mb = 25”C; GND = OV TYPICAL UNIT AO BO Cl = 50pF; VCC = 5V 2.7 2.2

Contextual Info: Philips Semiconductors Product specification Dual 4-input NAND gate 74ABT20 QUICK REFERENCE DATA SYMBOL PARAMETER Propagation delay An, Bn, Cn, Dn to Yn tpLH tpHL LOGIC DIAGRAM CONDITIONS Tamb = 25°C; GND = OV TYPICAL Cl = 50pF; VCC = 5V 5 Ï CO CO «9*9

74ABT20

Abstract: 74ABT20D 74ABT20N 74ABT20PW TPL 762 JF
Contextual Info: Philips Semiconductors Product specification Dual 4-input NAND gate 74ABT20 QUICK REFERENCE DATA LOGIC DIAGRAM CONDITIONS Tamb = 25°C; GND = 0V SYMBOL PARAMETER tpLH tpHL Propagation delay An, Bn, Cn, Dn to Yn tOSLH *OSHL Output to Output skew CiN Input capacitance