S808B Search Results

S-808b

Abstract: S808B
Contextual Info: M ITSUBISHI ASTTLs M 74A S808B P HEX 2-IN PUT AND DRIVER DESCRIPTION The M 74A S 808B P is a sem iconductor integrated circuit PIN CONFIGURATION TOP VIEW — w — consisting of six 2-input positive-logic A N D buffer gates, usable as n egative-log ic OR buffer gates.

S-808b

Abstract: S808B
Contextual Info: D M 54A S808B /D M 74A S808B NATIONAL SEMICOND {LOGIC} bï Ï>Ë| b5G1155 □□51ÖQ3 S 6501122 NATIONAL SEMICONDUCTOR -61C 5 1 8 0 3 D National Semiconductor S808B/S808B Hex 2-Input AND Drivers G eneral Description Absolute Maxim um Ratings

74ALS808

Abstract: 74ALS808A S-808b LS808A SN54ALS808 74as808
Contextual Info: SN54ALS808A, S808B, SN74ALS808A, S808B HEX 2-INPUT AND DRIVERS D 2 6 6 1 , DECEMBER 1 9 8 2 - SN 54A LS808A, SN 54A S808B . . - J PACKAGE SN 74A LS808A, S808B . . . DW OR N PACKAGE ALS808A has Typical Delay Time of 4 .8 ns C l = 50 pF and Typical Power Dissipation

Contextual Info: SN54ALS808A, S808B, SN74ALS808A, S808B HEX 2-INPUT AND DRIVERS D2661. DECEMBER 1982 - REVISED MAY 1986 High Capacitive Drive Capability S N 54A LS808A, SN 54A S808B . . . J PACKAGE S N 74A LS808A, SN S808B . . . DW OR N PACKAGE 'ALS808A has Typical Delay Time of 4.8 ns

SN54AS808B

Abstract: SN74AS808B s134b 10114Y
Contextual Info: S808B, S808B HEX 2-INPUT AND DRIVERS D2661, D E C E M B E R 1 9 8 2 - R E V IS E D M A Y 1986 • High Capacitive Drive Capability S808B . . . J PACKAGE S808B . .D W O R N PACKAGE TOP VIEW 'S808B has Typical Delay Time of 3.2 ns (C l = 50 pF) and Typical Power Dissipation

Contextual Info: MI TSU BISHI -CDGTL LOGIC} Tl D Ë J ^24=^27 GD122S4 D MITSUBISHI ASTTLs SC* M S808BP 3 T - n - ts HEX 2-INPU T AND DRIVER N °"c“ S° 6249827 MITSUBISHI D G T L L O G T c 7~ DESCRIPTION The S808BP is a semiconductor integrated circuit consisting of six 2-input positive-logic AND buffer gates,