S5.5V Search Results

Contextual Info: 1 0 4 8 ,5 7 6 W O R D x PRELIMINARY 4 BIT D Y N A M IC R A M DESCRIPTION The TC514402AP/AJ/ASJ/AZ is the new generation dynamic RAM organized 1,048,576 words by 4 bits. The TC514402AP/AJ/ASJ/AZ utilizes TOSHIBA’S CMOS Silicon gate process technology as well as

Contextual Info: May 1990 FUjlTSU IPRODUCT PROFILE: MB85230 -80L/-10L/-12L CMOS 1M X 8 LOW POWER DRAM MODULE The Fujitsu MB85230 is a fully decoded, CMOS dynamic random access memory DRAM module consisting of eight MB81C1000 devices. The MB85230 is optimized for those applications requiring high speed, high performance and

Contextual Info: PRELIMINARY 1,048,576 W ORD x 4 BIT DYN AM IC RAM DESCRIPTION T he T C 514410A P /A J/A SJ/A Z is the n e w g en e ra tio n dyn am ic R A M organized 1 ,0 4 8 ,5 7 6 words by 4 bits. T he T C 514410A P /A J/A SJ/A Z u tiliz es T O S H IB A ’S CM OS S ilico n gate process tech n ology as w e ll as

AZL-70

Contextual Info: PRELIMINARY 1,048,576 WORD x 4 BIT DYNAMIC RAM DESCRIPTION The TC514400APL/AJL/ASJL/AZL is the new generation dynamic RAM organized 1,048,576 words by 4 bits. The TC514400APL/AJL/ASJL/AZL utilizes TOSHIBA’S CMOS Silicon gate process technology as well as advanced circuit techniques to provide wide operating margins, both internally and to the

33D10

Abstract: A4t 3m 3 pin DDD22 S2042B-05 1010 OEI YAT-6
Contextual Info: PRELIMINARY DEVICE SPECIFICATION >9MCC HIGH PERFORMANCE SERIAL INTERFACE CIRCUITS FEATURES • Functionally compliant with ANSI X3T11 Fibre Channel physical and transmission protocol standards • S2042 transmitter incorporates phase-locked loop PLL providing clock synthesis from lowspeed reference

m62x42

Abstract: OKI M62X42B M62X42B 400P Crystal STDP MSM62X42BX
Contextual Info: O K I Sem iconductor MSM62X42B REAL TIM E CLOCK 1C W ITH B U ILT-IN CRYSTAL DESCRIPTION The MSM62X42B is a bus-connection Micro* com puter peripheral IC of a Real Tim e Clock w ith built-in crystal in the p erpetual calendar w hich can be read and w ritten from a second

UTP HA3

Contextual Info: MITSUBISHI LSIs M 5 M 4 1 8 1 2 5 A J - 5 , - 6 , - 7 , - 5 S , - 6 S , - 7 S HYPER PAGE MODE 1048576-BIT 131072-WQRP BY 8-BIT DYNAMIC RAM DESCRIPTION This is a family of 131072-word by 8-bit dynamic RAMs, fabricated with a high performance CMOS process, and is ideal for largecapacity memory systems where high speed, low power

M5M41166

Abstract: M5M4116 M5M411664
Contextual Info: MITSUBISHI LSIs M 5 M 4 1 1 6 6 4 A J .T P 1 - 5 ,- 6 ,- 7 ,-5 S ,- 6 S ,- 7 S _FAST PAGE MODE 1048576-BIT 65536-W ORD BY 16-BIT DYNAMIC RAM DESCRIPTION This is a family of 65536-word by 16-bit dynamic RAMs, fabricated with a high performance CMOS process, and is ideal for

U716

Abstract: U6915 1178Q
Contextual Info: H Enhanced DM2M36SJ/DM2M32SJ 2Mbx36/2Mbx32 Enhanced DRAM SIMM IVfemoiy Suterns I x . Product Specification Features Architecture • 4KByte SRAM Cache Memory for 12ns Random Reads Within Two Active Cache Pages ■ Fast DRAM Array for 30ns Axessto Any New Page

Contextual Info: Communication iCs SCSI Active Terminator BH9595FP-Y/BH9596FP-Y These S C SI active terminators, developed a s a substitute for conventional discrete terminators, m aintain g o o d co n ­ siste n cy between V M level 2.85V and G N D level (OV) and between V M level and V dd level, and have extrem ely low

NE5512

Abstract: S 8742 LM334 NE5037 NE5037N
Contextual Info: Product specification Philips Semiconductors Linear Products NE5037 6-Bit A/D converter parallel outputs PIN CONFIGURATION DESCRIPTION The NE5037 is a low cost, complete successive-approxlmadon analog-to-digital (A/D) converter, fabricated using Bipolar/lzL

IC558

Contextual Info: 8 ,1 9 2 W O R D x 9 B IT C M O S S T A T IC R A M D E S C R IP T IO N The TC5589P/J is a 73,728 bits high speed static random access memory organized as 8,192 words by 9 bits using CMOS technology, and operated from a single 5-volt supply. Toshiba’s CMOS technology

24LC02A

Abstract: 24AA02
Contextual Info: 24AA01/02 & Microchip 1.8 Volt IK and 2K CMOS Serial Electrically Erasable PROM FEATURES DESCRIPTION • Single supply with operation down to 1.8 V • Low power CMOS technology — 1 mA active current typical — 10 nA standby current typical at 5.5 V — 3 HA standby current typical at 1.8 V

Contextual Info: R C H I I - P S E M IC O N D U C T O R -n FST3125 Quad Bus Switch General Description Features The Fairchild Switch FST3125 provides lo u r high-speed C M OS TT L-com patible bus sw itches. The low on resistance ot the switch allows inputs to be connected to outputs w ith ­

Contextual Info: PIC16C5X M ic r o c h ip EPROM/ROM-Based 8-Bit CMOS Microcontroller Series Devices Included in this Data Sheet: • 12-bit w ide instructions • PIC16C52 • 8-bit w ide data path • PIC16C54S • Seven o r eight special function hardware registers • PIC16CR54S

Contextual Info: KM93C46V CMOS EEPROM 1K Bit Serial Electrically Erasable PR O M FEATURES GENERAL DESCRIPTION • Operating Temperature Range — KM93C46V : Commercial — KM93C46VI: Industrial • Single 3 volt Supply • High performance Advanced CMOS Technology — Reliable floating gate technology

8117400

Contextual Info: Fujfrsu November 1993 Edition 2.0 DATA SHEET MB85390 / 85391-60/-70/-80 CMOS 4 M x 32 Fast Page Mode DRAM Module CMOS 4,194,304 x 32 Bit Fast Page Mode DRAM Module The Fujitsu MB85390 and MB85391 are fully decoded, CMOS dynamic random access memory DRAM modules consisting of eight MB8117400 devices. The

Contextual Info: Enhanced Memory Systems Inc. DM512K32SmM512K36STBMultibankEDO 512Kbx 32/512Kbx 36 EDRAM SIMM Product Specification Features Architecture • 4KByte SRAM Cache Memory for 12ns Random Reads Within Four Actives Pages Multibank Cache ■ Fast DRAM Array for 30ns Access to Any New Page

Contextual Info: M SC23109D-xxBS/DS3 1999.03.25 OKI semiconductor M 1,048,576 Word By 9 Bit DYNAMIC RAM MODULE : FAST PAGE MODE TYPE_ G E N E R A L D E SC R IP T IO N The Oki MSC23109D-xxBS/DS3 is a fully dccoded, 1,048,576 word X 9 bit CMOS dynamic random

TDA 7786

Abstract: crystal washing machine service manual sfd 655 triac tag 8739 UM1233 E36 conclusion on lpg gas detector TL507 project on digital voltmeter using IC 7107 RS 307-402 TDA7786 causing for zero leading suppression 7447
Contextual Info: Issued March 1988 8773 Data Library Contents list and semiconductor device type index Data library contents Subject Title Number Communications Equipment B.T. telephone connection system Digital compact paging system Escort 2 + 6 telephone switching system

414256-10

Abstract: 414256 MSM414256-10 MSM414256-12 MSM414256-12RS
Contextual Info: O K I S E M I C O N D U C T O R GR O U P ôi OKI » Ë J b 7 E M S M 0 OODSSbt, 5 | ~ ¿.6724240 O K I S E M I C O N D U C T O R G R O U P semiconductor 89D 02566 MSM414256RS 262,144-WORD X ~J7 D 4-BIT DYNAMIC RAM GENERAL DESCRIPTION The MSM414256RS is a new generation dynamic RAM organized as 262,144 words by 4 bits.

Contextual Info: ^ 7 2 4 0 TOSHIBA 002Ö3T7 TIT TC51Y18165BFT-70 PRELIMINARY 1,048,576 WORD X 16 BIT EDO DYNAMIC RAM Description The TC51V18165BFT is the Hyper Page Mode (EDO) dynamic RAM organized 1,048,576 w ords by 16 bits. The TC51V18165BFT utilizes Toshiba’s CMOS silicon gate process technology as well as advanced circuit techniques to provide

PLS167AN

Abstract: IRZ 46 PLS167A PLS167AA PLS167N PLS Philips handbook
Contextual Info: Philips Semiconductors Programmable Logic Devices Product specification Programmable logic sequencers 0 . _ R (14x48x6 P LS 167/A DESCRIPTION FEATURES The PLS167 and PLS167A are bipolar, Programmable Logic State machines of the Mealy type. The Programmable Logic

Contextual Info: VOLTAGE DETECTOR N NJM2405 N JM 2405 is a d u a l c o m p a ra to r, inclu d in g the high precision reference voltage circuit. Both ch an n els h av e hysteresis pins, so it co u ld p ro v id e th e hysteretic function for systems. It has the w ide ran g e o f o p eratin g voltage a n d w orks w ith less cu rren t consum ption, so th a t it is suitable for detecting a b n o rm a l