RESISTOR47 Search Results

philips 5.1 home theater ir remote controller ic

Abstract: futaba vfd Futaba VFD 4 Digit for digital Clock vfd schematics Futaba vfd controller philips Futaba display Futaba display vcr Futaba VFD display futaba vfd seven segment
Contextual Info: UM0440 User manual Front panel based on STFPC320 Introduction This document explains the functioning of the front panel evaluation board based on the STFPC320 which consists of the front panel controller STFPC320 and microcontroller ST72F325 as I2C master. The basic idea is to develop a front panel for the DVD Recorder

Contextual Info: MUN5233T1 Transistors Pre-Biased "Digital" Transistor No. of Units Per Package1 V BR CEO (V)50 V(BR)CBO (V)50 I(C) Max. (A)50m Absolute Max. Power Diss. (W)150m I(CBO) Max. (A)100n @V(CBO) (V) (Test Condition)50 h(FE) Min. Current gain.80 h(FE) Max. Current gain.200

Contextual Info: 2SC3653 Transistors Pre-Biased "Digital" Transistor No. of Units Per Package1 V BR CEO (V)50 V(BR)CBO (V)50 I(C) Max. (A)100m Absolute Max. Power Diss. (W)400m I(CBO) Max. (A)100n @V(CBO) (V) (Test Condition)40 h(FE) Min. Current gain.50 h(FE) Max. Current gain.

Contextual Info: MUN5214T1 Transistors Pre-Biased "Digital" Transistor No. of Units Per Package1 V BR CEO (V)50 V(BR)CBO (V)50 I(C) Max. (A)50m Absolute Max. Power Diss. (W)150m I(CBO) Max. (A)100n @V(CBO) (V) (Test Condition)50 h(FE) Min. Current gain.80 h(FE) Max. Current gain.140

Contextual Info: IMH10A Transistors Pre-Biased "Digital" Transistor No. of Units Per Package2 V BR CEO (V)50 V(BR)CBO (V) I(C) Max. (A)100m Absolute Max. Power Diss. (W) I(CBO) Max. (A) @V(CBO) (V) (Test Condition) h(FE) Min. Current gain.80 h(FE) Max. Current gain. @I(C) (A) (Test Condition)10m

Contextual Info: 2SA1345 Transistors Pre-Biased "Digital" Transistor No. of Units Per Package1 V BR CEO (V)50 V(BR)CBO (V)50 I(C) Max. (A)100m Absolute Max. Power Diss. (W)300m I(CBO) Max. (A)100n @V(CBO) (V) (Test Condition)40 h(FE) Min. Current gain.50 h(FE) Max. Current gain.

Contextual Info: 1TA114YU Transistors Pre-Biased "Digital" Transistor No. of Units Per Package1 V BR CEO (V)50 V(BR)CBO (V) I(C) Max. (A)70m Absolute Max. Power Diss. (W)200m I(CBO) Max. (A) @V(CBO) (V) (Test Condition) h(FE) Min. Current gain.68 h(FE) Max. Current gain. @I(C) (A) (Test Condition)5.0m

Contextual Info: 2SC4049 Transistors Pre-Biased "Digital" Transistor No. of Units Per Package1 V BR CEO (V)50 V(BR)CBO (V)50 I(C) Max. (A)100m Absolute Max. Power Diss. (W)300m I(CBO) Max. (A)100n @V(CBO) (V) (Test Condition)40 h(FE) Min. Current gain.70 h(FE) Max. Current gain.

vhdl HDB3

Abstract: PQFP208 footprint MLL41 74XXX139 alarm clock design of digital VHDL digital alarm clock vhdl code vhdl code for 16 bit Pseudorandom Streams Generation EQUAD 74hc04bl PM6344
Contextual Info: PM4344 TQUAD/PM6344 EQUAD RELEASED REFERENCE DESIGN PMC-980328 ISSUE 1 TQUAD/EQUAD REFERENCE DESIGN PM4344/PM6344 TQUAD/EQUAD WITH QDSX REFERENCE DESIGN ISSUE 1: DECEMBER 1998 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000

pic16c748

Abstract: 74XXX138 PIC16c74 block diagram CAP320 POL-10UF smd code book s EQUAD PIC16C74 processing multiple byte SPI PACKETS 68HC11 74XXX245
Contextual Info: PMC-Sierra, Inc. REFERENCE DESIGN ISSUE 1 PM6344 EQUAD Quadruple E1 Framer PM6344 EQUAD EQUAD with QDSX Reference Design Issue 1: September, 1996 PMC-Sierra, Inc. 105 - 8555 Baxter Place, Burnaby, BC Canada V5A 4V7 604 415 6000 PMC-Sierra, Inc. REFERENCE DESIGN

TXC-02050 schematics

Abstract: LT1066 PM4314 PM5346 PM5355 PM7322 PM7344 PM7346 RCMP-800 ARF1065-ND
Contextual Info: PM7346 S/UNI-QJET PRELIMINARY REFERENCE DESIGN PMC-980182 ISSUE 1 S/UNI-QJET REFERENCE DESIGN PM7346 TM S/UNI- QJET S/UNI-QJET REFERENCE DESIGN ISSUE 1: JUNE 1998 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

SMD transistor LD3

Abstract: TSOP31236 Futaba VFD Futaba 11-MT BZ1 zener diode Futaba Futaba 4 - MT futaba mt Futaba display capacitor 100nf 0805
Contextual Info: STEVAL-CBP002V1 Bills of material Designator Quantity Reference Value / Generic Part Number Package Manufacturer / Supplier Manufacturer’s /Supplier’s ordering code / Orderable Part Number U2 1 STFPC320 Front Panel controller STFPC320BTR TQFP52 ST STFPC320BTR

PLX9050

Abstract: C143 ESP C144 ESP xc95216pq160 plx vhdl code 3F6 smd a/transistor c114 esp 96F8740 smd code STPA 1410G6
Contextual Info: PM5351 S/UNI-155-TETRA RELEASED REFERENCE DESIGN PMC-1991709 ISSUE 1 S/UNI 155 TETRA WITH S/UNI ATLAS REFERENCE DESIGN PM5351 S/UNI-155 TETRA WITH S/UNI ATLAS REFERENCE DESIGN RELEASED ISSUE 1: SEPTEMBER 2001 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Contextual Info: MMUN2214LT1 Transistors Pre-Biased "Digital" Transistor No. of Units Per Package1 V BR CEO (V)50 V(BR)CBO (V)50 I(C) Max. (A)100m Absolute Max. Power Diss. (W)200m I(CBO) Max. (A)100n @V(CBO) (V) (Test Condition)50 h(FE) Min. Current gain.80 h(FE) Max. Current gain.140

Contextual Info: RN1005 Transistors Pre-Biased "Digital" Transistor No. of Units Per Package V BR CEO (V)50 V(BR)CBO (V) I(C) Max. (A)100m Absolute Max. Power Diss. (W)400m I(CBO) Max. (A) @V(CBO) (V) (Test Condition) h(FE) Min. Current gain.80 h(FE) Max. Current gain. @I(C) (A) (Test Condition)10m

Contextual Info: 2SC3395 Transistors Pre-Biased "Digital" Transistor No. of Units Per Package1 V BR CEO (V)50 V(BR)CBO (V)50 I(C) Max. (A)100m Absolute Max. Power Diss. (W)200m I(CBO) Max. (A)100n @V(CBO) (V) (Test Condition)40 h(FE) Min. Current gain.50 h(FE) Max. Current gain.

Contextual Info: MUN5134T1 Transistors Pre-Biased "Digital" Transistor No. of Units Per Package1 V BR CEO (V)50 V(BR)CBO (V)50 I(C) Max. (A)50m Absolute Max. Power Diss. (W)150m I(CBO) Max. (A)100n @V(CBO) (V) (Test Condition)50 h(FE) Min. Current gain.80 h(FE) Max. Current gain.130

Contextual Info: MUN5234T1 Transistors Pre-Biased "Digital" Transistor No. of Units Per Package1 V BR CEO (V)50 V(BR)CBO (V)50 I(C) Max. (A)50m Absolute Max. Power Diss. (W)150m I(CBO) Max. (A)100n @V(CBO) (V) (Test Condition)50 h(FE) Min. Current gain.80 h(FE) Max. Current gain.150

Contextual Info: 2SA1565 Transistors Pre-Biased "Digital" Transistor No. of Units Per Package1 V BR CEO (V)50 V(BR)CBO (V)50 I(C) Max. (A)100m Absolute Max. Power Diss. (W)300m I(CBO) Max. (A)100n @V(CBO) (V) (Test Condition)40 h(FE) Min. Current gain.70 h(FE) Max. Current gain.

Contextual Info: IMH10 Transistors Pre-Biased "Digital" Transistor No. of Units Per Package2 V BR CEO (V)50 V(BR)CBO (V) I(C) Max. (A)100m Absolute Max. Power Diss. (W) I(CBO) Max. (A) @V(CBO) (V) (Test Condition) h(FE) Min. Current gain.80 h(FE) Max. Current gain. @I(C) (A) (Test Condition)10m

Contextual Info: MUN5213T1 Transistors Pre-Biased "Digital" Transistor No. of Units Per Package1 V BR CEO (V)50 V(BR)CBO (V)50 I(C) Max. (A)50m Absolute Max. Power Diss. (W)150m I(CBO) Max. (A)100n @V(CBO) (V) (Test Condition)50 h(FE) Min. Current gain.80 h(FE) Max. Current gain.140

Contextual Info: RN1006 Transistors Pre-Biased "Digital" Transistor No. of Units Per Package V BR CEO (V)50 V(BR)CBO (V) I(C) Max. (A)100m Absolute Max. Power Diss. (W)400m I(CBO) Max. (A) @V(CBO) (V) (Test Condition) h(FE) Min. Current gain.80 h(FE) Max. Current gain. @I(C) (A) (Test Condition)10m

Contextual Info: MUN5113T1 Transistors Pre-Biased "Digital" Transistor No. of Units Per Package1 V BR CEO (V)50 V(BR)CBO (V)50 I(C) Max. (A)50m Absolute Max. Power Diss. (W)150m I(CBO) Max. (A)100n @V(CBO) (V) (Test Condition)50 h(FE) Min. Current gain.80 h(FE) Max. Current gain.140

XC95108-PQ100

Abstract: xc95108pq100 PM4314 PM4388 PM6344 PM7346 PM7364 PM7366 PM7375 C264 voltage regulator
Contextual Info: PM7346 S/UNI-QJET PRELIMINARY REFERENCE DESIGN PMC-971060 ISSUE 2 S/UNI-QJET WITH FREEDM-8 REFERENCE DESIGN PM7346 TM S/UNI- QJET S/UNI-QJET WITH FREEDM-8 REFERENCE DESIGN ISSUE 2: JANUARY 1998 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000