RESISTOR MK2 Search Results

SMA0207-MK2

Abstract: NKS3 resistors CHP0603 RS68Y RN6015 RS58Y SFR25H RC41U 39 RC31U RCMS02
Contextual Info: Surface Mount Film Resistors Vishay FEATURES • Thick and thin film resistor chips • Metal film MELF resistors • CECC and MIL approved styles • Suitable for auto-Insertion equipment PRODUCT DESCRIPTION Thick Film Chip Resistors CECC approval available

NJU6515

Abstract: AN 7062 NJU6515C SEG55 eahf
Contextual Info: NJU6515 10-CHARACTER 1-LINE LCD DRIVER WITH SMOOTH SCROLL FUNCTION GENERAL DESCRIPTION PACKAGE OUTLINE The NJU6515 LCD driver can realize 10-character 1-line and max. 118 icons display. It contains voltage boost, regulator, bleeder resistor, general output ports, oscillator,

"Resistor array"

Abstract: 8 resistor array 10k C 3866 resistor array 10k dip t 3866 X9313 X9313W X9313Z t 3866 pin voltage X93132
Contextual Info: Kuan A dvance Inform ation 31 Resistor Array X9313 E2POT Digitally Controlled Potentiometer FEATURES DESCRIPTION • Compatible with X9MME and X9CMME • Low Power CMOS — Active Current, 3 mA Max — Standby Current, 500 joA Max • 31 Resistive Elements

Contextual Info: File No.: Version: Page: Date: SYNTON-TECH CORPORATION LOW VALUE WIRE RESISTORS RW-02 D 1/12 2010.12.03 1. SUBJECT This specification applies on the low value wire resistors made by SYNTON-TECH Corporation. 2. QUALITY The resistor is manufactured by highly quality-controlled

Contextual Info: IXD2135/36 Synchronous 1A Step-Up DC/DC Converter transistor capable of providing up to 1.0 A inductor peak current. The IXD2135/36 are able to start operation at 0.9 V input voltage to generate 3.3 V output voltage with a 33 Ω load resistor, which is suitable for mobile

Contextual Info: BACK MK2015 PECL Clock Synthesizer ICROCLOCK Description Features The MK2015 is an inexpensive way to generate a low jitter 155.52 MHz or other high speed differential PECL clock output from a low frequency crystal input. Using Phase-Locked-Loop (PLL) techniques, the device uses a standard

Contextual Info: MK2049-36 3.3 Volt Communications Clock PLL Description Features The MK2049-36 is a Phased Locked Loop PLL based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-36 generates T1, E1, T3, E3, OC3 and

Contextual Info: MK2049-45A 3.3 Volt Communications Clock PLL Description Features The MK2049-45A is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate

Contextual Info: MK2049-36 3.3 Volt Communications Clock PLL Description Features The MK2049-36 is a Phased Locked Loop PLL based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-36 generates T1, E1, T3, E3, OC3 and

ETS300

Abstract: GR-1244 MAN05 MK2049-34 MK2049-36 MK2049-45 TR62411
Contextual Info: DATASHEET MK2049-36 3.3 VOLT COMMUNICATIONS CLOCK PLL Description Features The MK2049-36 is a Phased Locked Loop PLL based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-36 generates T1, E1, T3, E3, OC3 and other communications

ETS300

Abstract: GR-1244 MAN05 MK2049-34 MK2049-36 MK2049-45A MK2069 MT9045 TR62411 crystal 27 MHz
Contextual Info: DATASHEET MK2049-45A 3.3 VOLT COMMUNICATIONS CLOCK PLL Description Features The MK2049-45A is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input

Contextual Info: DATASHEET MK2049-45A 3.3 VOLT COMMUNICATIONS CLOCK PLL Description Features The MK2049-45A is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input

Contextual Info: MK2049-45 3.3V Communications Clock PLL Description The MK2049-45 is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate

MK2049-45

Abstract: Space Qualified VCXO ETS300 GR-1244 MAN05 MK2049-34 MK2049-36 MK2069 MT9045 TR62411
Contextual Info: MK2049-45 3.3V Communications Clock PLL Description Features The MK2049-45 is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate

ETS300

Abstract: GR-1244 MAN05 MK2049-34 MK2049-36 MK2049-45 TR62411
Contextual Info: DATASHEET MK2049-36 3.3 VOLT COMMUNICATIONS CLOCK PLL Description Features The MK2049-36 is a Phased Locked Loop PLL based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-36 generates T1, E1, T3, E3, OC3 and other communications

Contextual Info: DATASHEET 3.3 VOLT COMMUNICATIONS CLOCK PLL M K 2 0 4 9 -3 6 Description Features The MK2049-36 is a Phased Locked Loop PLL based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-36 generates T1, E1, T3, E3, OC3 and other communications

Contextual Info: MK2049-45 3.3V Communications Clock PLL Description Features The MK2049-45 is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate

MK2049-45A

Abstract: MT9045 TR62411 ETS300 GR-1244 MAN05 MK2049-34 MK2049-36 MK2069 FXP MARKING
Contextual Info: DATASHEET MK2049-45A 3.3 VOLT COMMUNICATIONS CLOCK PLL Description Features The MK2049-45A is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input

Contextual Info: DATASHEET 3.3 VOLT COMMUNICATIONS CLOCK PLL MK2049-45 Description Features The MK2049-45 is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input

ETS300

Abstract: GR-1244 MAN05 MK2049-34 MK2049-36 MK2049-36SI MK2049-36SITR MK2049-45 TR62411 MK2049-36SILF
Contextual Info: DATASHEET MK2049-36 3.3 VOLT COMMUNICATIONS CLOCK PLL Description Features The MK2049-36 is a Phased Locked Loop PLL based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-36 generates T1, E1, T3, E3, OC3 and other communications

ETS300

Abstract: GR-1244 MAN05 MK2049-34 MK2049-36 MK2049-45 MK2049-45A MT9045 TR62411
Contextual Info: DATASHEET MK2049-45 3.3 VOLT COMMUNICATIONS CLOCK PLL Description Features The MK2049-45 is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input

MK2049-45ASILFTR

Abstract: ETS300 GR-1244 MAN05 MK2049-34 MK2049-36 MK2049-45A MT9045 TR62411 vcxo 2048 khz
Contextual Info: DATASHEET MK2049-45A 3.3 VOLT COMMUNICATIONS CLOCK PLL Description Features The MK2049-45A is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input

HP3785B

Contextual Info: MK2049 Communications Clock PLL ICROCLOCK Description Features The MK2049 is a Phase-Locked Loop PLL based clock synthesizer, which accepts an 8 kHz clock input as a reference and generates T1, E1, T3, E3, and OC3 frequencies. The device can also accept a

Contextual Info: A A MK2049 Communications Clock PLL icro C lock Description Features The MK2049 is a Phase-Locked Loop PLL based clock synthesizer, which accepts an 8 kHz clock input as a reference and generates T l, El, T3, E3, and OC3 frequencies. The device can also accept a