RECOM RCG Search Results

opto coupler 701

Abstract: LT1005 LT1005C LT1005CK LT1005CT LT1005M LT1005MK opto coupler 417
Contextual Info: L I I I L / \ k _ TECHNOLOGY NOT RECOM M ENDED FOR NEW DESIGNS Contact Linear Technology for Potential Replacement F€OTUR€S • Two Regulated Outputs + 5Vat 1 amp + 5 V at 35mA ■ 2% Output Voltage Tolerance ■ 66 dB Ripple Rejection ■ 0.5% Load Regulation

Alla

Abstract: 74AC11191
Contextual Info: 54AC11191, 74AC11191 SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS T I0 1 5 1 — 0 3 4 2 6 , M A R C H 1 9 9 0 54AC11191 . . . J PACKAGE 74AC11191 . . . DW OR N PACKAGE • Single Down/Up Count Control Line • Look-Ahead Circuitry Enhances Speed of Cascaded Counters

Contextual Info: 74ACT11593 8-BIT BINARY COUNTER WITH PARALLEL-INPUT REGISTERS AND 3-STATE OUTPUTS SCAS203 - JUNE 1992 - REVISED APRIL 1993 DW OR NT PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Parallel Register Inputs/Binary Counter/3-State Outputs 24 ] CCK [ 1 U

Contextual Info: E2/E3F Device 8-, 34 Mbit/s Framer TXC-03701 DATA SH EE T FEATURES DESCRIPTION The E2/E3 Fram er E2/E3F is a C M O S VLSI device th at provides the functions needed to fram e a w ideband payload to one of four C C IT T R ecom m endations: G .742, G .745, G.751, or G .753. T he E 2/E 3F interfaces

Contextual Info: DATA SHEET pivr PMC-950449 ISSUE 6 1 PMC-Sierra, Inc. PM7344 s / u n i - m p h MULTI-PHY USER NETWORK INTERFACE FEATURES • Single chip quad ATM User Network Interface operating at 1.544 Mbit/s or 2.048 Mbit/s. • Im plements the ATM Forum User Network Interface Specification V3.1 for

Contextual Info: E2/E3F Device 8-, 34-Mbit/s Framer TXC-03701B DATA SH EE T FEATURES DESCRIPTION The E2/E3 Fram er E2/E3F is a C M O S VLSI device th at provides the fu nctio ns needed to fram e a w ideband payload to one of four ITU -TSS R ecom m endations: G.742, G .745, G.751, or G.753. The E 2/E 3F interfaces

nec 0882 p 2

Abstract: transistor 7813 nec 0882 p nec 0882 gb10v
Contextual Info: DATA SHEET SILICON TRANSISTOR 2SC4094 MICROWAVE LOW NOISE AMPLIFIER NPN SILICON EPITAXIAL TRANSISTOR 4 PINS MINI MOLD DESCRIPTION PACKAGE DIMENSIONS Units: mm The 2SC4094 is an NPN epitaxial silicon transistor designed for use in low-noise and small signal amplifiers from VHF band to UHF band.

Polyvaricon

Abstract: A10268
Contextual Info: Ordering number : EN5837 Monolithic Linear 1C LA1828 Single-Chip Tuner IC for Portable Radio /Cassette Recorders with Manual Tuning Functions Package Dimensions • AM: unit:mm RF am plifier, m ixer, oscillator, IF am plifier, detector, A G C , tuning d isplay

Contextual Info: 5V, 500mA Linear Regulator with ENABLE, RESET, and Watchdog Description Features The CS-8140 is a 5V W atchdog Regulator w ith protection circuitry and three logic control functions that allow a microprocessor to control its own pow er supply. The CS-8140 is designed

Contextual Info: PRELIMINARY M IC R O N 512 K 512K WIDE DRAM X X M T4C851 2/3 8 W ID E D R A M 8 DRAM WIDE DRAM FAST-PAGE-MODE FEATURES PIN ASSIGNMENT Top View • Industry-standard x8 pinouts, timing, functions and packages • Address entry: ten row-addresses, nine columnaddresses

Contextual Info: DS3F Device DS3 Framer TXC-03401 DATA SHEE T FEATURES DESCRIPTION • DS3 payload access, bit-serial or nibble-parallel • C -bit parity or M 13 operating m ode • C -bit interface 13 C -bits in, 14 out • Detect and generate D S3 AIS, and idle signals

BT459KG110

Abstract: BT459 brooktree bt459 B1459 RESISTOR AXIAL 0309
Contextual Info: P relim inary Inform ation This document contains information on a new product. The parametric information, although not fully characterised, is the result of testing initial devices. D istinguishing Featu res 135, 110, 80 MHz Operation 1:1, 4:1, or 5:1 Multiplexed Pixel Ports

B 58055

Abstract: 58055 MQ 136 pin diagram Recom RCG
Contextual Info: SÌ9136 Siliconix Multi-Output Power-Supply Controller New Product FEATURES • Up to 95% Efficiency • High Efficiency Pulse Skipping M ode O peration at Light Load • 3% Total Regulation Each Controller • O nly Three Inductors R equired - No Transform er

Contextual Info: X REVISION CHK ENGRG NOTICE LTR EN98965HG DESCRIPTION DATE APPROVED REVISE AND REDRAW WITH CHANGES PRELIMINARY DOCUMENT Notes: □ This is a Top Level D raw ing TLD LORAL REF. ONLY FOR SUM M ARY OF LATEST REVISION: SEE SHEET 2 Part Num ber: See Table, Sec 1.2

Contextual Info: Order th is data sheet by MCM514400/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information 1M x 4 CMOS Dynamic RAM Page Mode J PACKAGE PLA STIC SM A LL OUTLIN E C A SE 822A The MCM514400 is a 0.8p CMOS high-speed, dynamic random access memory. It is organized as 1,048,576 four-bit words and fabricated with CMOS silicon-gate process

TB 1226 BN

Abstract: 531 T70 n03 0AS001 B05AD 2U 34
Contextual Info: in y Intel 450NX PCIset 82454NX PCI Expander Bridge PXB 82453NX Data Path Multiplexor (MUX) 82452NX RAS/CAS Generator (RCG) 82451 NX Memory & I/O Controller (MIOC) Revision 1.3 March 1999 Intel Corporation 1998,1999 Information in this document is provided in connection with Intel products. No license, express or

2m137

Contextual Info: MT90733 CM OS @ DS3 Framer DS3F MITEL Preliminary Information Features ISSUE 3_ January 1996 M aps broadband payloads in the DS3 form at O rdering Inform ation DS3 payload access in eith er bit-serial or n ibble-parallel m ode MT90733AP 68 Pin PLCC

T474

Abstract: ITW 106K
Contextual Info: A dvance Inform ation Bt474 This docum ent contains inform ation on a p ro d u ct u n d e r d e v e lo p m e n t T he param etric inform ation contains target p aram eters and is su b ject to change. D istinguishing Featu res 85, 66 M H z Pipelined O peration

smd transistor cy 813

Abstract: transistor NEC D 882 p circuit diagram CSS102A
Contextual Info: C S 5101A a m a m m r im C S 5102A m mmm* Semiconductor Corporation 16-Bit, 100 kHz/20 kHz A/D Converters Features General Description • Monolithic CMOS A/D Converters Inherent Sampling Architecture 2-Channel Input Multiplexer Flexible Serial Output Port

Contextual Info: M B86964 FUJITSU ETHERNET CONTROLLER WITH 10BASE-T TRANSCEIVER PRELIMINARY DATA SHEET DECEMBER 1993 M B 8 6 9 6 4 ’s transm it buffer is p ro g ram m a b le as a single i FEATURES F ully co m p lian t w ith IS O /A N S I/IE E E 8802-3 sp ecific a­ tions

Contextual Info: E2D0026-39-23 O K I Semiconductor P rev io u s version : M ay. 1997 M SM 6688/6688L ADPCM Solid-State Recorder 1C GENERAL DESCRIPTION The M SM 6688/6688L is a "solid-state recorder" IC developed using the ADPCM method. By externally connecting a microphone, a speaker, a speaker drive amplifier, and a dedicated register

Contextual Info: MB86831 FUJITSU S P A R C Iite S E R IE S 3 2 -B IT R IS C E M B E D D E D P R O C E S S O DATA S H E E T FE B R U A R Y 199 Built-in Internal Clock frequency multiplier circuit FEATURES Single vector trapping 66MH/., 80MHz and 100 MHz. versions each with

KPBC

Abstract: LT 7245 sola ceramic hemal MC705 FM 6502
Contextual Info: ANALOG DEVICES LC2M0S 12-Bit DACPORT FEATURES 12-Bit CMOS DAC w ith O u tp u t A m p lifie r and Reference Parallel Loading S tructure: AD7245 8 + 4 Loading S tru ctu re : AD7248 Single or Dual Supply Operation Fast D igital Interface (80ns WR Pulse) Low Pow er (65mW typ)

sim 300 gsm module VR 0511

Abstract: nf schaltungen PEB 3164 pdsp 2113 halbleiter datenbuch star delta timer siemens siemens cpu 216-2 Siemens Optoelectronic ITT Semiconductors siemens fl 232 v7
Contextual Info: SIEMENS ICs for Communications DSP Oriented PBX Controller DOC PEB 20560 Version 2.1 Contents Overview Functional Block Description Operational Description DSP Core OAK Description of Registers Applications Electrical Characteristics Ordering Information and Mechanical Data