R30S1 Search Results

Contextual Info: BUS EXCHANGER FOR R3051 FAMILY ADVANCE INFORMATION IDT79R3720 FEATURES: DESCRIPTION: • Direct Interface to R3051 Family RISChipSet — R3051™ Family of Integrated RISController™ CPUs — R3721 DRAM Controller — R3722 I/O Interface Controller • Interfaces a single CPU bus to interleaved or banked

eerl

Abstract: ym oca QQ11
Contextual Info: INTEGRATE» DEVICE SflE D • 4025771 R3081 BLOCK DIAGRAM BrCond 3:2,0 C lock G enerator Unit/ C lock Doubler M aster Pipeline Control System Control C oprocessor Integer CPU Core Floating Point C oprocessor (CP1) (CP0) Exception/Control Registers G eneral Registers

arbiter decoder -1996

Contextual Info: IDT79R3051/79R3052 RlSControllers IDT79R3051™, 79R3051E IDT79R3052”, 79R3052E Integrated Device Technology, Inc. FEATURES: — On-chip DMA arbiter — Bus Interface minimizes design com plexity Single clock input with 40%-60% duty cycle 35 MIPS, over 64,000 Dhrystones at 40MHz

intel ifx780

Abstract: R3051 R3057 3051M
Contextual Info: £DRAM Controller For 25MHz & 33MHz IDT R3051 Microprocessors ô \j/ _ ^ p M T R O IM nummary i lup 3R \M ca c lu . the liD R W t tan load a new page into ca th e in just 33ns a single wait slate at 2S or 33MII/. bus rales I . W rite cycles are RanHi'on's enhanced DRAM ( I ’D K W I I is t,u idea! iiic m so ia for

TAG 9031

Contextual Info: ENHANCED ORION 64-BIT RISC MICROPROCESSOR O R ÍÓ N IDT79R4700 PRELIMINARY Inc. • Low-power operation - 3.3V power supply - 24mW/MHZ typical internal power dissipation 2.4W @ 100MHz, 3.3V - Standby mode reduces internal power • Standard operating system support includes:

Contextual Info: IDT79R3051 , 79R3051E IDT79R3052™, 79R3052E 1DT79R3051/79R3052 INTEGRATED RISControllers™ Integrated Device Technology, Inc. — On-chip DMA arbiter — Bus Interface minimizes design complexity Single clock input with 40%-60% duty cycle Direct interface to R3720/21/22 RISChipset™

MIPS R3051

Contextual Info: Integrated Device Technology, Inc. IDT79R3051 FAMILY OF INTEGRATED RISControllers ADVANCE INFORMATION IDT 79R3051™, 79R3051E IDT 79R3052™, 79R3052E FEATURES: • Instruction set compatible with IDT79R3000A and IDT79R3001 MIPS RISC CPUs • High level of integration minimizes system cost, power

R3051

Abstract: 79r3001 R3052 MIPS R3051 79R3051 79R3052 79R3052E IDT79R3051 embedded microprocessors MIPS Translation Lookaside Buffer TLB R3000
Contextual Info: Integrated Device Technology, Inc. ADVANCE INFORMATION IDT 79R3051 , 79R3051E IDT 79R3052™, 79R3052E IDT79R3051 FAMILY OF INTEGRATED RISControllers™ FEATURES: — O n-chip DM A arbiter — Bus Interface M inim izes P rocessor Stalls Single clock input

Contextual Info: IDT79R3041 INTEGRATEDRISController™ FORLOW-COSTSYSTEMS FEATURES: • Instruction set compatible with IDT79R3000A and R3051 Family MIPS RISC CPUs • High level of integration minimizes system cost — RISC CPU — Multiply/divide unit — Instruction Cache

sirit

Contextual Info: IDT79R3051 , 79R3051E IDT79R3052™, 79R3052E IDT79 R3051 /79R3052 INTEGRATED RlSControllers1'1 Integrated Device Technology, Inc. — On-chip DMA arbiter — Bus Interface minimizes design complexity Single clock input with 40% -60% duty cycle 35 MIPS, over 64,000 Dhrystones at 40MHz

Contextual Info: 16-BIT TRI-PORT BUS EXCHANGER IDT73720/A Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • High-speed 16-bit bus exchange for interbus communica­ tion in the following environments: — Mulli-way interleaving memory — Multiplexed address and data busses

R3051

Abstract: dram memory 256kx4 IDT79R3721 DRAM controller DRAMs Bus Exchanger
Contextual Info: INTEGRATED DEVICE 3ñE D • MÖSS771 0007714 3 ■ IDT ^ DRAM CONTROLLER FOR R3051 FAMILY ~ T - 5 Z . - Z ' b - z \