QUAD TIME DELAY Search Results

constant current circuit using 555 timer

Abstract: quad monostable 555 off delay timer circuits Quad 555 timers 555 timer as monostable 555 TIMER ASTABLE 555 off delay timer 555 monostable 555 timing circuit ALD4501
Contextual Info: CIRCUIT IDEAS FOR DESIGNERS Category: Timer Oscillator Schematic no. time_15005.0 Quad Monostable Mode Operation One Shot Pulse Description This circuit is configured in quad monostable mode of operation, which are four independent basic time delay circuits, each using a 555 type of timer. The single chip quad timer offer excellent timing and temperature

Contextual Info: ILD55, ILQ30, ILQ31, ILQ55 Vishay Semiconductors Optocoupler, Photodarlington Output, Dual, Quad Channel FEATURES Dual Channel A 1 8 E C 2 7 C C 3 6 C • Fast fall time, 35 s A 4 5 E • Single, dual and quad channel • 125 mA load current rating • Fast rise time, 10 μs

Contextual Info: UTC NE558 LINEAR INTEGRATED CIRCUIT QUAD TIMER DESCRIPTION The UTC NE558 is a monolithic quad timer which can be used to produce four entirely independent timing functions. The highly stable, general purpose controller can be used in a monostable mode to produce accurate time delays.

Contextual Info: SLWS134 GC4114 QUAD TRANSMIT CHIP DATASHEET May 22, 2000 Rev 1.0 This datasheet contains information which may be changed at any time without notice. GC4114 QUAD TRANSMIT CHIP DATA SHEET REV 1.0 REVISION HISTORY Revision Date Description 0.0 20 April 1998

12-Bit DAC counter

Abstract: GC4114 SLWS134 "initial synchronization"
Contextual Info: SLWS134 GC4114 QUAD TRANSMIT CHIP DATASHEET May 22, 2000 Rev 1.0 This datasheet contains information which may be changed at any time without notice. GC4114 QUAD TRANSMIT CHIP DATA SHEET REV 1.0 REVISION HISTORY Revision Date Description 0.0 20 April 1998

Contextual Info: SLWS132 GC4014 QUAD RECEIVER CHIP DATASHEET April 27, 1999 Rev 0.5 This datasheet contains information which may be changed at any time without notice. GC4014 QUAD RECEIVER CHIP DATA SHEET REV 0.5 REVISION HISTORY Revision Date Description 0.0 1 Dec. 1997

Contextual Info: C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4093BP/BF/BFN TC4093 QUAD 2-INPUT NAND SCHMITT TRIGGERS The TC4093BP is a quad 2-input NAND gate having Schmitt trrigger function for all the input terminals. Since the circuit threshold voltage varies with rising time

f 49055

Abstract: HA9P4905-5 HA1-4900-2 HA1-4902-2 HA1-4905-5 HA3-4905-5 HA-4900 HA-4902 HA-4905 HD74C02
Contextual Info: HA-4900, HA-4902, HA-4905 Data Sheet September 1998 File Number 2855.3 Precision Quad Comparators Features The HA-4900 series are monolithic, quad, precision comparators offering fast response time, low offset voltage, low offset current and virtually no channel-to-channel

ic driver mosfet 8 pin

Contextual Info: MD1811 Initial Release High Speed Quad MOSFET Driver General Description Features 6ns rise and fall time 2 A peak output source/sink current 1.2V to 5V input CMOS compatible 5V to 12V total supply voltage Smart Logic threshold Low jitter design Quad matched channels

Contextual Info: TC4093BP/BF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4093BP,TC4093BF TC4093B Quad 2-Input NAND Schmitt Triggers The TC4093B is a quad 2-input NAND gate having Schmitt trigger function for all the input terminals. Since the circuit threshold voltage varies with rising time and

B0347

Abstract: T0426 T0427 33h-3Fh lvds-compatible SLOS616 S-03920 TQFP-100 T0455-01 T0430-01
Contextual Info: THS788 www.ti.com SLOS616 – MARCH 2010 Quad-Channel Time Measurement Unit TMU FEATURES DESCRIPTION • • • • • • • The THS788 is a four-channel timing measurement unit (TMU) that incorporates a time-to-digital converter (TDC) architecture for fast and accurate

EP9734-16

Abstract: EP9734-17 EP9734-18 EP9734-19 EP9734-35 EP9734-5 EP9734-6 EP9734-7 EP9734-8
Contextual Info: 14 Pin DIP Quad TTL Compatible Active Delay Lines DELAY TIME +5% or ±2 nSf PART NUMBER DELAY TIME ±5% or ±2 nSt PART NUMBER 5 6 7 8 9 10 11 12 13 14 15 EP9734-5 EP9734-6 EP9734-7 EP9734-8 EP9734-9 EP9734-10 EP 9734-11 EP9734-12 EP9734-13 EP9734-14 EP9734-15

A2557

Abstract: MS-013 A2557KLBTR-T
Contextual Info: A2557 Protected Quad Driver with Fault Detection and Sleep Mode Last Time Buy These parts are in production but have been determined to be LAST TIME BUY. This classification indicates that the product is obsolete and notice has been given. Sale of this device is currently

PC28F128P30BF65

Abstract: PC28F128P30BF PC28F640P30TF PC28F640P30TF65 js28f128p30tf75 JS28F640P30BF js28f640 js28f128p30tf PC28F640 JS28F128P30
Contextual Info: Numonyx Axcell P30-65nm Flash Memory 128-Mbit, 64-Mbit Single Bit per Cell SBC Datasheet Product Features „ High Performance: — 65ns initial access time for Easy BGA and QUAD+ — 75ns initial access time for TSOP — 25ns 8-word asynchronous-page read mode

Contextual Info: SIEM ENS SINGLE CHANNEL DUAL CHANNEL FEATURES • C urrent Transfer Ratio IL/ILD/ILQ30/55,100% min. IL/ILD/ILQ31,200% min. • 125 mA Load C urrent Rating • Fast Rise Time, 10 ^S • Fast Fall Time, 35 nS • Single, Dual and Quad Channel • Solid State R eliability

rb414

Abstract: KM44C1003
Contextual Info: KM44C1003DT CMOS DR A M ELECTRONICS 1M x 4 Bit CMOS Quad CAS DRAM with Fast Page Mode DESCRIPTION This is a fam ily of 1,048,576 x 4 bit Fast Page Mode Quad CAS CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Access time -5, -6 or -7 , power

HCF4011BE

Abstract: HCF4011BEY HCF4011B HCF4011BM1 HCF4011M013TR
Contextual Info: HCF4011B QUAD 2 INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ PROPAGATION DELAY TIME tPD = 60ns Typ. at VDD = 10V BUFFERED INPUTS AND OUTPUTS STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS QUIESCENT CURRENT SPECIFIED UP TO 20V 5V, 10V AND 15V PARAMETRIC RATINGS

HCF4001B

Abstract: HCF4001BE HCF4001BEY HCF4001BM1 HCF4001M013TR
Contextual Info: HCF4001B QUAD 2-INPUT NOR GATE • ■ ■ ■ ■ ■ ■ ■ PROPAGATION DELAY TIME: tPD = 50ns TYP. at VDD = 10V CL = 50pF BUFFERED INPUTS AND OUTPUTS STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS QUIESCENT CURRENT SPECIFIED UP TO 20V 5V, 10V AND 15V PARAMETRIC RATINGS

HCF4001BE

Abstract: HCF4001B HCF4001BEY HCF4001BM1 HCF4001M013TR HCF4001
Contextual Info: HCF4001B QUAD 2-INPUT NOR GATE • ■ ■ ■ ■ ■ ■ PROPAGATION DELAY TIME: tPD = 50ns TYP. at VDD = 10V CL = 50pF BUFFERED INPUTS AND OUTPUTS STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS QUIESCENT CURRENT SPECIFIED UP TO 20V 5V, 10V AND 15V PARAMETRIC RATINGS

variable PWM by using dsp TMS320F240

Abstract: TMS320F240 "space vector" tms320 PWM by using dsp TMS320F240 SEG CT 7800 TMS320C240 F240 TMS320 TMS320C25 TMS320X240
Contextual Info: TMS320C240, TMS320F240 DSP CONTROLLERS High-Performance Static CMOS Technology Includes the T320C2xLP Core CPU - Source Code Compatible With TMS320C25 - Upwardly Compatible With TMS320C5x - 132-Pin Plastic Quad Flat Package - 50-ns Instruction Cycle Time Industrial Temperature Standard,

Contextual Info: in te l 3207A QUAD BIPOLAR-TO-MOS LEVEL SHIFTER AND DRIVER • High Speed, 45 nsec Max. — Delay + Transition Time Over Temperature with 200 pF Load ■ TTL and DTL Compatible Inputs ■ 1103 and 1103A Memory Compatible at Output ■ Simplifies Design — Replaces

34S71

Abstract: 005D C1005D
Contextual Info: K M 4 4 C 1 005 DJ ELECTRONICS CMOS DRAM 1 M x 4 B i t CMOS Quad CAS DRAM with Extended Data Out DESCRIPTION This is a family of 1,048,576 x 4 bit Extended Data Out Quad CAS CMOS DRAMs. Extended Data Out offers high speed random access of memory cells within the same row. Access time -5, -6 or -7 , power

74118

Abstract: ttl 74118 1FT65 D0341A4 ci 74118 GD341 1MX4 1003-D
Contextual Info: KM44C1003DJ CMOS DRAM E LE C T R O N IC S 1M x 4 Bit CMOS Quad CAS DRAM with Fast Page Mode DESCRIPTION This is a family of 1,048,576 x 4 bit Fast Page Mode Quad CA S C M O S DRAMs. Fast Page Mode offers high speed random access of memory cells within the sam e row. Access time -5, -6 or -7 , powér

pin diagram of ic 7495

Abstract: data sheet ic 7495 0124D T8536 L7591 L9215G T8533 T8534 T8535
Contextual Info: Preliminary Data Sheet February 2001 T8535/T8536 Quad Programmable Codec Features • 5 V operation ■ Per-channel programmable gains, equalization, termination impedance, and hybrid balance ■ Programmable µ-law, or A-law modes: — Up to 256 time slots per frame