QS5LV919TYPICALLY Search Results

pe9a

Contextual Info: H Semiconductor. Inc 3.3V Low Skew CMOS o s s l v s is PLL Clock Driver With in f o r m a t io n g r a t e d LOOP Fi Iter 1 FEATURES/BENEFITS DESCRIPTION • • • • • • • • • • • • • The QS5LV919 Clock Driver uses an internal phase locked loop PLL to lock low skew outputs to one of