PU BF Search Results

dsa 362

Abstract: 35015 z-fio Z8001 Z8002 Z8038 Z8060 Z8538 DSA 250-20 2A3J
Contextual Info: ’•'Vs Zilog P ro d u c t S p e c ific a tio n Z 8038/Z 8538 FIO FIFO Input/ Output Interface Unit October 1988 F eatures ■ 128-byte FIFO buffer provides asynchronous b idirectional C PU /C PU or C P U /peripheral interface, exp an d ab le to any width in byte

Contextual Info: 3 DRAWI NG T H IS MADE DRAWING COPYRIGHT RESERVED. AMP IN IS THIRD ANGDE U N PU BLISH ED . 19 BY PRODUCTS MAY AMP BE 2 PROJECTION RELEASED FOR PU BLIC A TIO N ] N C O R P O R A T E D , HARR I S B U R G , P A . COVERED BY U.5. AND FOREIGN ALL INTERNATIONAL

Contextual Info: 3 DRAWING T H IS 0 MADE DRAWING COPYRIG HT RESERVED. IN 15 THIRD U N PU BLISH ED . 19 AMP ANGLE PRODUCTS RELEASED AMP BY MAY BE 2 PROJECTION FOR ] N C O R P O R A T E D , HARR I S B U R G , PA . COVERED U.S. BY AND BO RE IGN DIST LOC PU BLIC A TIO N ALL

HD6803P-1

Abstract: HD6803P HD6803 dj,aj MC6803 eye-200 7812 2A MSD 7812 1S2074 HD6800
Contextual Info: H D 6 8 0 3 , H D 6 8 0 3 - 1 -M P U Micro Processing Unit The HD6803 M PU is an 8-bit micro processing unit which is compatible with the HMCS6800 family of parts. The HD6803 M PU is object code compatible with the HD6800 with improved execution times o f key instructions plus several new 16-bit and

m5l8255

Abstract: M74ls373P M74ls373 5L8255AP-5 M5L8255A m5l8255ap-5 5l8255
Contextual Info: MITSUBISHI L S I* M 5L8255AP-5 PROGRAMMABLE PERIPHERAL INTERFACE DESCRIPTION The M5L8255AP-5 is a fam ily of g e n era l-pu rpose program m ­ PIN CONFIGURATION TOP VIEW able in p u t/ output d e vice s d e sig ned for use w ith an 8-bit/16 bit parallel CPU as in pu t/ou tput ports. D evice is fab ricate d

Contextual Info: 7 DRAWING MADE T H IS DRAWING IN COPYRIGHT RESERVED. THIRD IS PRODUCTS RELEASED AMP BY MAY BE 4 PRO JEC TIO N U N PU BLISH ED . 13 AMP ANGLE FOR PU BLIC A T IO N I N C O R P O R A T E D , HARR I S B U R G , P A . COVERED BY U .S. AND F O R E I G N MOD ,19

HD6803

Abstract: MC6803-1 7812 jrc 74LS373 HD6800 HD6803-1 HMCS6800 MC6803 DP-401 aml+20
Contextual Info: HD6803, HD6803-1 MPU Micro Processing Unit T h e H D 6 8 03 M PU is an 8 -bit m icro processing unit w hich is compatible w ith the H M C S6 80 0 fam ily o f parts. The H D 6803 M PU is object code compatible w ith the H D 6 8 0 0 w ith improved execution times o f key instructions plus several new 16-bit and

DP-401

Abstract: HD6803 55AP
Contextual Info: HD6803, HD6803-1 MPU Micro Processing Unit T h e H D 6 8 03 M PU is an 8 -bit m icro processing unit w hich is compatible w ith the H M C S6 80 0 fam ily o f parts. The H D 6803 M PU is object code compatible w ith the H D 6 8 0 0 w ith improved execution times o f key instructions plus several new 16-bit and

A205F

Abstract: PS42A 16X16 TLCS-90 TLCS-900 tlcs90 CPU900L1-1 lxkt
Contextual Info: TO SH IB A TLCS-900/L CPU 900, 900/L, 900/H, 900/L1f 900/H2 CPU=I T7 D i l i g o TLCS-900 V ’J - X K i i , C PU n 7 t L T 900, (D 900/L, (D 900/H, ® 900/LI, (D 900/H2 (7 5 f w C P U 3 T ^ è 0 > ^ 0 £-t 0 C PU JR ^ 77 K 1/ 7 / ''i 7 flil — £ ^ 7 i| S

287258

Abstract: 32388
Contextual Info: 7 D R A W IN G TH IS MA D E IN D R A W IN G COPYRIG H T RESERVED. TH IR D IS BY PR ODU C TS MAY RELEASED AMP BE 4 PR O JEC TIO N U N PU B LISH ED . 13 AMP ANGLE FOR PU B LIC A TIO N I N C O R P O R A T E D , HARR I S B U R G , P A . COVERED BY U.S. AND F O R E I G N

TC4093

Abstract: toshiba tc4093 TC4093BP DIP14-P-300-2 TC4011B TC4093B TC4093BF TC4093BFN
Contextual Info: TO SH IBA TC4093BP/BF/BFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4093BP, TC4093BF, TC4093BFN TC4093B QUAD 2 -IN PU T NAND SCHMITT TRIGGERS Note The JEDEC SOP (FN) is not available in Japan. The TC4093B is a quad 2 - input NAND gate having Schmitt

Contextual Info: T H IS O R A IIM G IS U NPU BLISH ED. PLANO HO PU BLICADO CJ COPYRIGHT 1996 « L É A Ì É 6 fò S Pu& LltAflO N L I B R E DE PUBt- ICApO ALL RIGH TS RESER VED. _ TODOS „L O S .D E R E C H O S _ R £ S £ R_ . V A_ I^ S . 8T AMP I NCORPORATED. 10$ PRODUCTOS AMP ESTAN C U B IC R IO S PQfi PATEN T ES ACTUALES O P EN D IEN T E S

4021B

Abstract: HCF4014B
Contextual Info: h c c /hc f4o1 4b HCC/HCF4021 B r = 7 SCS•THOMSON Ä 7# RKS«LiM@iD gS 8-STAGE STATIC SHIFT REGISTERS 4014B S Y N C H R O N O U S P A R A L L E L OR SERIAL INPUT /SERIAL O U T PU T 4021 B A SY N CH RO NO US PARALLEL I N P U T OR S Y N C H R O N O U S SERIAL INPUT /SERIAL O U T PU T

Contextual Info: r n ThiS Mawin6 S un* j 6u Sh» . “ I— RELEASED PM PU&JWI6N— “ *- . RiShTS ftESEftvtt. > COPYRIGHT - _ Bf TYCO ELECTROMCS CORPORATION. •— MECHANICAL: — - .100 A \ / O — - 9 O O 4 6 10 8 .100 TYP A A .050 TYP - . + 5 0 - -

Contextual Info: HD64180S -NPU Network Processing Unit • DESCRIPTION The HD64180S, network processing unit (N PU ), provides multipurpose high-speed com m unication control functions on a single LSI chip. The HD64180S offers high perform ance com m unication protocol process­

Contextual Info: 7 THIS DRAWING IS UNPUBLISHED. VERTRAULICHE UNVEROEFFENTLICHTE ZEICHNUNG RELEASED FOR PUBLICATION FREI FUER VEROEFFE.NTLICHUNG ^LL RIGHTS RESERVED. BY AMP iNCORPORATPQ N L UK PU HA I t u . ALLE REICHTE VORBEHALTEN. C COPYRIGHT 19- , 19-. ï ï 6 MATED WITH:

L103B

Abstract: 6Z121 r302b 2SA179 D15105 HGR-30 BC45B Z-59 lz-173 Z436
Contextual Info: R9 1 1K A 33 0 33 0 R P2 0 10 5 V _C PU V _C PU ST P C LK # S LP # IN T R N MI A N3 1 A DS # R4 4 T DO T DI T MS T CK P ICD 1 P ICD 0 33 0 ST P C LK # S LP # IN T R N MI R P1 4 10 5 10P 8R -1 K R 1 2 3 4 6 7 8 9 A G3 5 A H3 0 M3 6 L3 7 AL3 3 A N3 7 A N3 5

Contextual Info: Signetics 54F139 Decoder/Demultiplexer Dual l-of-4 Decoder/Demultiplexer Product Specification Military Logic Products ORDERING INFORMATION FUNCTION TABLE FEATURES • Demultiplexing capability IN PU TS • Two independent 1-of-4 decoders E Ao A, 00 Q, • Multifunction capability

bgt S2000

Abstract: MC68B09 HD6809P NAFI adcb 27 ASSEMBLER RR00110 SAA 1025 HD68B09 AOCB
Contextual Info: HD6809,HD68A09,HD68B09 M PU M icro Processing Unit The HD6809 is a revolutionary high performance 8-bit microprocessor which supports modem programming tech­ niques such as position independence, reentrancy, and modular programming. This third-generation addition to the HMCS6800 family has

Contextual Info: TOSHIBA TC74VHCT08AF/AFN/AFT TOSHIBA CM O S DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74VHCT08AF, TC74VHCT08AFN, TC74VHCT08AFT Q UAD 2 -IN PU T A N D GATE The TC74VHCT08A is an advanced high speed CMOS 2INPUT AND GATE fabricated with silicon gate C2MOS

bs 103f

Abstract: 11A3 ST MC68B09
Contextual Info: HD6809,HD68A09,HD68B09 M PU Micro Processing Unit The HD6809 is a revolutionary high performance 8-bit microprocessor which supports modem programming tech­ niques such as position independence, reentrancy, and modular programming. This third-generation addition to the HMCS6600 family has

mcm6665

Abstract: MC6809E A7 B14 MC68B09E mc6821 16k x 1 ram vdg 6847 details MCM-4116 sn74ls244 motorola
Contextual Info: M MOTOROLA SN74LS783/ MC6883 SN74LS785 SYNCHRONOUS ADDRESS MULTIPLEXER The SN74LS783/MC68B3 and SN74LS785 bring together the MC6809E (M PU), the MC6847 (Color Video Oisplay Generator) and dynamic RAM to form a highly effective, compact and cost effec­ tive computer and display system.

Contextual Info: ><115< A?B?7GHE; >?=> DCJ;E E;@7K <QM^_\Q] h 2OW HEIGHTy ptmv MM h pu| SWITCHING CAPABILITY h tK< DIELECTRIC STRENGTH gBETWEEN COIL AND CONTACTSh h ~REEPAGE DISTANCEy poMM h 3EETING <*+ ovook ourp REINFORCE INSULATION h 6RODUCT IN ACCORDANCE TO /+~ uorrtlp AVAILABLE

RZ2833B60W

Contextual Info: N AUER PHILIPS/DISCRETE ObE J> bfc.53131 0015257 5 RZ2833B60W T " 3 ^ - » ^ PU LSED M ICRO W AVE POW ER T R A N SIST O R NPN silicon planar epitaxial microwave power transistor, intended for use in a common-base class-C broadband pulse power amplifier with a frequency range o f 2,8 to 3,3 GHz.