PSN25 Search Results
PSN25 Price and Stock
Wiremold 6ATC2PSN-256IN PREWIRED SURF PT W 25FT LEAD SN |
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6ATC2PSN-25 | Bulk | 5 Weeks | 1 |
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Hubbell Incorporated BRMOD4PSN25Hubbell |
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BRMOD4PSN25 |
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Autonics Corporation PSN25-5DNSensor: inductive; 0÷5mm; NPN / NO; Usup: 10÷30VDC; 200mA; cables |
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PSN25-5DN | 31 | 1 |
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Autonics Corporation PSN25-5AOSensor: inductive; 0÷5mm; 2-wire NO; Usup: 100÷240VAC; 200mA; 2m |
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PSN25-5AO | 9 | 1 |
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Autonics Corporation PSN25-5ACSensor: inductive; 0÷5mm; 2-wire NC; Usup: 100÷240VAC; 200mA; 2m |
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PSN25-5AC | 6 | 1 |
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PSN25 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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Contextual Info: QuickLogic PolarPro Data Sheet • • • • • • Combining Low Power, Performance, Density, and Embedded RAM Device Highlights 4 programmable global clock networks • Quadrant-based segmentable clock networks Low Power Programmable Logic 20 quad clock networks per device |
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QL1P100Contextual Info: QuickLogic PolarPro Device Data Sheet — QL1P075, QL1P100, QL1P200, and QL1P300 •••••• Combining Low Power, Performance, Density, and Embedded RAM • Quadrant-based segmentable clock networks Device Highlights 20 quad clock networks per device |
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ql1p075ql1p100ql1p200ql1p300 | |
s41 hall effect sensor s41
Abstract: sensor sr21 datalogic DATA SENSOR TLU-015 D50NK LASER ILLUMINATOR hall effect sensor s41
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4-20mas41 hall effect sensor s41sensor sr21 datalogicdata sensor tlu-015+3 | |
asynchronous fifo vhdl
Abstract: 8 BIT ALU design with verilog/vhdl code full subtractor using ic 74138 74139 for bcd to excess 3 code vhdl code for 8bit bcd to seven segment display 32 BIT ALU design with verilog/vhdl code 74594 16 BIT ALU design with verilog/vhdl code B1516 RAM1024
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asynchronous fifo vhdl8 bit alu design with verilog/vhdl codefull subtractor using ic 7413874139 for bcd to excess 3 code+6 | |
PU132
Abstract: QL1P1 LBGA thermal QL1P100 LVCMOS25 MI0805K400R-10 PF144 WUN99 1P07
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ql1p075ql1p100ql1p200ql1p300+8 | |
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Contextual Info: QuickLogic PolarPro Data Sheet • • • • • • Combining Low Power, Performance, Density, and Embedded RAM Device Highlights • Quadrant-based segmentable clock networks 20 quad clock networks per device Flexible Programmable Logic 4 quad clock networks per quadrant |
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Contextual Info: QuickLogic PolarPro Data Sheet • • • • • • Combining Low Power, Performance, Density, and Embedded RAM • Quadrant-based segmentable clock networks Device Highlights Flexible Programmable Logic • 0.18 µm, six layer metal CMOS process • 1.8 V core voltage, 1.8/2.5/3.3 V drive |
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Contextual Info: QuickLogic PolarPro Family Data Sheet • • • • • • Combining Low Power, Performance, Density, and Embedded RAM Device Highlights 4 programmable global clock networks • Quadrant-based segmentable clock networks Low Power Programmable Logic |
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Contextual Info: QuickLogic PolarPro Data Sheet • • • • • • Combining Low Power, Performance, Density, and Embedded RAM Device Highlights • Quadrant-based segmentable clock networks 20 quad clock networks per device Flexible Programmable Logic 4 quad clock networks per quadrant |
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LVCMOS25
Abstract: MI0805K400R-10 PF144 QL1P100
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ql1p075ql1p100ql1p200ql1p300+3 | |
PSN17-5DN
Abstract: PSN40-20DP PS50-30DN autonics PSN17 8DN PS50-30DP PSN25-5DN PSN30-15DN PS12-4DN PSN40-20DN autonics
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OCR Scan |
a001572psn17psn25psn30+11 | |
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Contextual Info: QuickLogic PolarPro Data Sheet • • • • • • Combining Low Power, Performance, Density, and Embedded RAM Device Highlights 4 programmable global clock networks • Quadrant-based segmentable clock networks Low Power Programmable Logic 20 quad clock networks per device |
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jedec package TFBGA 12
Abstract: 100 pin vqfp drawing LBGA thermal 8mm pitch BGA 256 pin 14x14 QUICKLOGIC SDIO Host
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jedec package tfbga 12100 pin vqfp drawinglbga thermal8mm pitch bga 256 pin 14x14+1 | |
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Contextual Info: QuickLogic PolarPro Device Data Sheet — QL1P075, QL1P100, QL1P200, and QL1P300 •••••• Combining Low Power, Performance, Density, and Embedded RAM • Quadrant-based segmentable clock networks Device Highlights 20 quad clock networks per device |
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ql1p075ql1p100ql1p200ql1p300 | |
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256X36
Abstract: QL1P100
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ql1p075ql1p100ql1p200ql1p300+1 | |
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Contextual Info: QuickLogic PolarPro Device Data Sheet — QL1P075, QL1P100, QL1P200, and QL1P300 •••••• Combining Low Power, Performance, Density, and Embedded RAM • Quadrant-based segmentable clock networks Device Highlights 20 quad clock networks per device |
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ql1p075ql1p100ql1p200ql1p300 | |
ci 567Contextual Info: QuickLogic PolarPro Data Sheet • • • • • • Combining Low Power, Performance, Density, and Embedded RAM Device Highlights 4 programmable global clock networks • Quadrant-based segmentable clock networks Low Power Programmable Logic 20 quad clock networks per device |
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ci 567 | |
ql1p100Contextual Info: QuickLogic PolarPro Data Sheet • • • • • • Combining Low Power, Performance, Density, and Embedded RAM Device Highlights • Quadrant-based segmentable clock networks 20 quad clock networks per device Flexible Programmable Logic 4 quad clock networks per quadrant |
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ql1p100 | |
QUICKLOGIC SDIO Host
Abstract: nand flash sdio quicklogic
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quicklogic sdio hostnand flash sdio quicklogic | |
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Contextual Info: QuickLogic PolarPro Data Sheet • • • • • • Combining Low Power, Performance, Density, and Embedded RAM • Quadrant-based segmentable clock networks Device Highlights 20 quad clock networks per device Flexible Programmable Logic 4 quad clock networks per quadrant |
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