PM835 Search Results

ZF40

Abstract: PM8351
Contextual Info: PM8351 OctalPHY Datasheet Preliminary PM8351 OCTALPHYTM 8 CHANNEL PHYSICAL LAYER TRANSCEIVER WITH GIGABIT ETHERNET PCS AND TRUNKING FOR 1.0 TO 1.25 GBPS INTERFACES DATA SHEET DOCUMENT ISSUE 6 ISSUED MARCH 2001 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Contextual Info: PM8354 QuadPHY 1G Preliminary 4-channel 1.0-1.25 Gbit/s Transceiver 25 :3 06 for the QuadPHY 1G. 03 PHYSICAL 20 • Ultra-low power operation using 0.18 µ CMOS technology. y, • Thermally enhanced, 289-pin, 19 mm x 19 mm CABGA package. • • • eb temperature range -40 to +85 °C and is

aanetcom

Abstract: pm8353
Contextual Info: PMC-Sierra,Inc. Preliminary PM8353 QuadPHY 4-Channel 1.0-1.25 Gbps Transceiver FEATURES • Four independent 1.0-1.25 Gbps transceivers • Ultra low power operation: 1.25 Watt typical • Integrated serializer/deserializer, clock synthesis, clock recovery, and 8B/10B

SMD codes

Abstract: 063310
Contextual Info: QuadPHY 10GX ASSP Telecom Standard Product Data Sheet Released PM8358 QuadPHY® 10GX 4 X 1.2 to 3.2 Gbit/s Quad, Fully Redundant, XAUI to XGMII, 10 Gigabit Ethernet / Fibre Channel Physical Layer Device Data Sheet Released Issue No. 5: April 2004 Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.

PM835

Abstract: DDR PHY ASIC PM8355 infiniband PHY
Contextual Info: PM8355 QuadPHY-II Advance 4-Channel 2.125, 2.5 and 3.125 Gbit/s Transceiver with Half-rate Support GENERAL DESCRIPTION SERIAL I/O TEST FEATURES The QuadPHY-II™ is a physical layer transceiver ideal for systems requiring high speed point-to-point communication links. It is applicable for PMAPMD connections in 10 GE, Infiniband 1

pm8353

Abstract: serial link clock signal
Contextual Info: PMC-Sierra,Inc. PM8353 QuadPHY 4-Channel 1.0-1.25 Gbps Transceiver FEATURES • Four independent 1.0-1.25 Gbit/s transceivers • Four secondary channels to support channel redundancy • Ultra low power operation: 1.25 Watt typical • Integrated serializer/deserializer, clock

Contextual Info: PM8352 OctalPHY 1G Advance 8-channel 1.0-1.25 Gbits/s Transceiver • Eight independent 1.0 to 1.25 Gbit/s • • AM :3 08 • Dual Data Rate DDR parallel interface • • 03 20 • Ultra-low power operation using 0.18 µ CMOS technology. • Thermally enhanced, 289-pin, 19 mm x

Contextual Info: PM8356 QuadPHY FC Preliminary TEST FEATURES • Supports differential PECL REFCLK at 106.25 MHz. • Programmable output current that directly drives 50 ohms. • Provides internal 100 ohm differential termination on transmit and receive high-speed signals for optimal signal

10625

Abstract: PM8355 PM8356
Contextual Info: PM8356 QuadPHY FC Preliminary 4 Channel 1.0625 and 2.125 Gbit/s Fibre Channel Transceiver FEATURES GENERAL • Four independent 1.0625 or 2.125 Gbit/s, bi-directional, Fibre Channel transceiver to 10 bit parallel interfaces. • Integrated serializer/de-serializer,

ANSI X3T11

Abstract: smd 1Gs PM8354 PMC-2030175 8B10B ansi encoder MDIO clause 22 T2FU
Contextual Info: QuadPHY 1G ASSP Telecom Standard Product Data Sheet Released PM8354 QuadPHY 1G 4 CHANNEL PHYSICAL LAYER TRANSCEIVER WITH GIGABIT ETHERNET PCS AND TRUNKING FOR 933 Mbit/s TO 1.25 Gbit/s INTERFACES Data Sheet Released Issue No. 4: May 2003 Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.

Contextual Info: PM8358 QuadPHY 10GX Preliminary 10GbE and 10GFC Compliant Transceiver • Wide operating range from 1.2 Gbit/s 3.2 Gbit/s enables backward compatibility • Integrated serializer/deserializer, clock synthesis, clock recovery and 8B/10B encode/decode logic.

DATA SHEET M 58655 P

Abstract: PM8354A-NI INDUCTIVE COMPONENTS k5 smd PM8354-NI smd 1Gs PM8354 PM8354A
Contextual Info: QuadPHY 1G ASSP Telecom Standard Product Data Sheet Released PM8354 & PM8354A QuadPHY 1G 4 CHANNEL PHYSICAL LAYER TRANSCEIVER WITH GIGABIT ETHERNET PCS AND TRUNKING FOR 933 Mbit/s TO 1.25 Gbit/s INTERFACES Data Sheet Released Issue No. 5: May 2004 Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.

PM8354

Contextual Info: PM8354 QuadPHY 1G Released 4-channel 933 Mbit/s - 1.25 Gbit/s Transceiver FEATURES GENERAL • • • • • TEST FEATURES • High-speed outputs feature • IEEE 1149.1 JTAG Boundary Scan support. • Built-in self-test BIST via internal packet programmable output current to optimize

Contextual Info: PM8355 QuadPHY II Released QuadPHY II 4-Channel 1.0625 to 3.125 Gbit/s Tranceiver GENERAL DESCRIPTION The QuadPHY II is a 10 Gbit/s bi-directional standards compliant physical layer transceiver ideal for high-speed serialbackplanes. • Integrated serializer/deserializer, clock

PM8358-NI

Abstract: PM8358 10G serdes 2.5 quad
Contextual Info: QuadPHY 10GX Device Errata Released PM8358 QuadPHY® 10GX 4 X 1.2 to 3.2 Gbit/s Quad, Fully Redundant XAUI to XGMII, 10 Gigabit Ethernet / Fibre Channel Physical Layer Device Errata Released Issue No. 4: December 2006 Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.

MDIO

Abstract: PM8352 router extender block diagram
Contextual Info: PM8352 OctalPHY 1G Released 8-channel 933 Mbit/s - 1.25 Gbit/s Transceiver FEATURES GENERAL • Eight independent 933 Mbit/s to 1.25 • • • • • Gbit/s IEEE 802.3-2000 Gigabit Ethernet compliant and ANSI X3T11 Fibre Channel System compatible transceivers.

CX4 connector

Abstract: xGMII to rj45 phy PM8358 10GBASE-CX4 PM8357 xaui
Contextual Info: PM8357 QuadPHY XR Preliminary Low Power 4 Channel Bi-directional 1.2 - 3.2 Gbit/s Retimer FEATURES GENERAL • Low power, 4 channel, bi-directional, full duplex, 1.2 - 3.2 Gbit/s retimer compliant with the 10 Gigabit Ethernet 10GE and proposed 10 Gigabit Fibre

Contextual Info: 9: 07 PM PM8355 QuadPHY II Datasheet Released ug Mo nd ay ,0 1A QuadPHY® II us t, 20 05 10 :1 PM8355 rtm in er In co n Four Channel 2.125-3.125 Gbits/s SERDES Proprietary and Confidential Released Issue 8: July 2005 Do wn lo ad ed by C on te n tT ea m of

Contextual Info: PM8352 OctalPHY 1G Advance 8-channel 1.0-1.25 Gbits/s Transceiver • Eight independent 1.0 to 1.25 Gbit/s • • AM :3 06 • Dual Data Rate DDR parallel interface • • 03 20 • Ultra-low power operation using 0.18 µ CMOS technology. y, • Thermally enhanced, 289-pin, 19 mm x

63-PM

Abstract: PM8355-NI
Contextual Info: 8: 39 PM PM8355 QuadPHY II Datasheet Released sd ay ,1 4D ec em QuadPHY® II be r, 20 05 07 :4 PM8355 In co n W ed ne Four Channel 2.125-3.125 Gbits/s SERDES ar tm in er Datasheet Released Issue 9: December 2005 Do wn lo ad ed by Co nt e nt Te a m of P Proprietary and Confidential

Contextual Info: 0: 30 PM PM8355 QuadPHY II Datasheet Released Mo nd ay ,0 QuadPHY® II 9M ay ,2 00 5 11 :3 PM8355 d of ag er rt on Four Channel 2.125-3.125 Gbits/s SERDES by sa tis h Datasheet Do wn lo ad ed Proprietary and Confidential Released Issue 7: June 2003 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

PMC-2010750

Abstract: PMC-2010793 PM8355 PMC-2012008 PMC-2012008, Digital Power Supply Bypass Guidelines
Contextual Info: PM8355 QuadPHY II Datasheet Released PM8355 QuadPHY® II Four Channel 2.125-3.125 Gbits/s SERDES Datasheet Proprietary and Confidential Released Issue 7: June 2003 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2000920, Issue 7

PM8358

Contextual Info: PM8358 QuadPHY 10GX Preliminary 10GbE and 10GFC Compliant Transceiver FEATURES • Wide operating range from 1.2 Gbit/s 3.2 Gbit/s enables backward compatibility • Integrated serializer/deserializer, clock synthesis, clock recovery and 8B/10B encode/decode logic.

m0335

Abstract: transistor m0335 TX-6-G RX-6-G RX3G M-0335 CD4087 RX6-G PM8359 ASIC, FCBGA
Contextual Info: PM8359 QuadPHY 6G Preview 4-Channel SERDES Serial Multiplexer/Demultiplexer Evaluation Device FEATURES GENERAL • Serial Multiplexer/Demultiplexer with a full-rate two-way aggregate throughput of 50 Gbit/s at 6.25 Gbit/s for backplane applications. • Multiplexes eight 3.125 Gbit/s serial