PLL50237 Search Results

Contextual Info: 750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s FEATURES 1 16 SEL0^ XIN 2 15 SEL1^ XOUT 3 14 GND SEL3^ 4 13 CLKC SEL2^ 5 12 VDD OE 6 11 CLKT VCON 7 10 GND GND 8 9 GND SEL0^ / VDD* SEL1^ TSSOP-16L VDD / GND* 12 11 10 9 DESCRIPTION

PLL502-35

Abstract: PLL502-37 PLL502-38 PLL502-39 QFN-16L
Contextual Info: 750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s FEATURES 1 16 SEL0^ XIN 2 15 SEL1^ XOUT 3 14 GND SEL3^ 4 13 CLKC SEL2^ 5 12 VDD OE 6 11 CLKT VCON 7 10 GND GND 8 9 GND SEL0^ / VDD* SEL1^ TSSOP-16L VDD / GND* 12 11 10 9 DESCRIPTION

PLL502-35

Abstract: PLL502-35OC PLL502-35OC-R PLL502-35QC PLL502-37 PLL502-38 PLL502-39 20 QFN 3x3
Contextual Info: PLL502-35/-37/-38/-39 750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s FEATURES 1 16 SEL0^ XIN 2 15 SEL1^ XOUT 3 14 GND SEL3^ 4 13 CLKC SEL2^ 5 12 VDD OE 6 11 CLKT VCON 7 10 GND GND 8 9 GND VDD / GND* SEL0^ / VDD* SEL1^ 12

PLL502-35

Abstract: PLL502-37 PLL502-38 PLL502-39 155.52MHZ vcxo
Contextual Info: Preliminary PLL502-35/-37/-38/-39 750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s FEATURES 1 16 SEL0^ XIN 2 15 SEL1^ XOUT 3 14 GND SEL3^ 4 13 CLKC SEL2^ 5 12 VDD OE 6 11 CLKT VCON 7 10 GND GND 8 9 GND XOUT 13 8 GND SEL3^

schematic diagram vga to rca

Abstract: HDMI TO VGA MONITOR PINOUT schematic diagram RCA to HDMI converter circuit schematic diagram DVI to rca HDMI to vga pinout schematic diagram hdmi to rca schematic diagram dvi to rgb S-VIDEO FPGA VGA interface rca TO VGA pinout VGA TO HDMI PINOUT
Contextual Info: Video Input/Output Daughter Card User Guide UG235 v1.2.1 October 31, 2007 R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the