PLCC-16 IC Search Results

vl16c552

Abstract: ST16C552 ST16C552IJ68 WD16C552 INS8250 NS16C550 ST16C450 ST16C550 ST16C552CJ68
Contextual Info: ST16C552 STARTECH An Company Printed August 16, 1996 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFO AND PARALLEL PRINTER PORT WITH POWER DOWN CAPABILITY DESCRIPTION PLCC PLCC Rev. 3.0 CDB* GND RIB* DSRB* CLK CSB* GND BIDEN ACK PE BUSY* SLCT VCC ERROR

t1703

Contextual Info: ^ Supertex inc. HV9120 HV9123 High-Voltage Current-Mode PWM Controller Ordering Information + V IN Min Max Feedback Accuracy Max Duty Cycle 10V 4 50V <±2 % 10V 4 50V <±2 % Package Options 20 Pin 16 Pin SOIC Plastic PLCC 16 Pin Ceramic DIP 16 Pin Plastic DIP

16C2550

Contextual Info: ST16C2550 ^STARTECH Printed September 7, 1994 DUAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs DESCRIPTION PLCC Package The ST16C2S50 is a dual asynchronous receiver and transm itter with 16 byte transmit and receive FIFO. Independent programmable baud rate generators are

bi-tronics

Abstract: ibm t41 terminal block in pdb ppf 11 16-BYTE ST78C36 ST78C36A ST78C36ACJ44 ST78C36CJ44 ST78C36CQ64
Contextual Info: ST78C36 ST78C36A ECP/EPP PARALLEL PRINTER PORT WITH 16-BYTE FIFO’s DESCRIPTION PLCC Package FEATURES • IBM AT bus compatible • Bi-directional port capability • 16 byte FIFO for ECP modes • On-chip oscillator ST78C36A, ST78C36CQ64 • Software selectable Interrupt (5, 7, or 9) and 8-bit

1fg1

Abstract: 16C1552 16c1550 st16c1550
Contextual Info: ST16C1550 ST16C1551/1552 STARTECH Printed September 15, 1994 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs DESCRIPTION PLCC Package The ST16C1550/51/52 is a universal asynchronous receiver and transmitter with 16 byte transmit and receive FIFO. A programmable baud rate generator is

50256P

Abstract: 50256P-12 50256CP-15 HM50256P-15 50256 50256CP hm*256p 50256-15 DP-16B
Contextual Info: H M 5 0 2 5 6 S e rie s 262144-word x 1-bit Dynamic Random Access Memory H M 50256P Series • FEATURES • • Industry Standard 16-Pin DIP, 18-Pin PLCC, 16-Pin ZIP Single 5V ±10% • On chip substrate bias generator • Low Power: 350mW active, 20mW standby

te disa 1202

Abstract: l286
Contextual Info: Final 80L286 Low-Power High-Performance Microprocessor with Memory Management and Protection Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • High-performance processor up to 13.3 times IAPX 86 when using the 16 MHz 80L286 Surface-m ountable PLCC for high density

MT5C2516

Contextual Info: MT5C2516 16K X 16 LA T C H E D SRAM MICRON 16K x 16 SRAM LATCHED SRAM WITH ADDRESS/ DATA INPUT LATCHES FEATURES • • • • 52-Pin PLCC SC-2 52-Pin PQFP (SC-5) ! - H S 5 8 KM “ iuj £ ui : <loim lm > >13 < !o < < o OPTIONS MARKING • Timing 12ns access

Contextual Info: ADVANCE INFORMATION in te i 8XC151 SA/SB HIGH-PERFORMANCE CHMOS MICROCONTROLLER Commercial/Express MCSi 51 Microcontroller Compatible Instruction Set Pin Compatible with 44-lead PLCC and 40-lead PDIP MCS 51 Sockets Fast Instruction Pipeline 16-bit Internal Code Fetch

Contextual Info: 5 mi ANALOG ► DEVICES Variable Resolution, Monolithic Resolver-to-Digital Converter AD2S83 FEATURES Monolithic Tracking R/D Converter High Accuracy Velocity Output High Max Tracking Rate 1040 RPS 10 Bits 44-Pin PLCC Package 10-, 12-, 14- or 16-Bit Resolution Set by User

Contextual Info: ANALOG DEVICES Variable Resolution, Resolver-to-Digital Converter AD2S83 FEATURES Tracking R/D Converter High Accuracy Velocity O utput High M ax Tracking Rate 1040 RPS 10 Bits 44-Lead PLCC Package 10-, 12-, 14- or 16-Bit Resolution Set by User Ratiom etric Conversion

Contextual Info: ANALOG DEVICES □ FEATURES Monolithic Tracking R/D Converter 44-Pin PLCC Package 10-, 12-, 14- or 16-Bit Resolution Set by User Ratiometric Conversion Low Power Consumption: 300 mW typ Dynamic Performance Set by User High Max Tracking Rate 1040 RPS 10 Bits

ics5300

Abstract: 8 bit color palette 256 color monitor circuit diagram
Contextual Info: ICS5300 Integrated Circuit Systems, Inc. GENDAC 8-Bit Integrated Clock-LUT-DAC Pin Configuration Features • • • • • • • • • • • • • • • 44-Pin PLCC Triple video DAC, dual clock generator, and a color palette 24, 16, 15 or 8-bit pseudo color pixel mode supports True

48 MHz Crystal

Abstract: floppy controller parallel port 74ls245 ST84C72 plcc ide controller
Contextual Info: STARTECH ST84C72 Printed August 3,1995 An 2E* EX4RCompany IDE INTERFACE WITH I/O DECODE DESCRIPTION PLCC package The ST84C72 is designed to replace all necessary TTL logics for 16 bit IDE interface and decode logic for floppy controller and serial / parallel I/O ports. A select

78C36A

Contextual Info: E X A ST78C36 ST7 8C36A R ECP/EPP P A R A LL EL PRINTER PO RT WITH 16-BYTE FIFO s DESCRIPTION PLCC Package The ST78C36/36A is a monolithic Parallel Port Inter­ face tor use with IBM PC compatible plattorms. Operation as a standard Centronics printer port is the

MC100H680

Abstract: MC100H680FN MC10H680 MC10H680FN T101
Contextual Info: MC10H680, MC100H680 4-Bit Differential ECL Busā to TTL Bus Transceiver GT3 VT2 GT4 TIO3 TCEB 25 24 23 22 21 20 17 VCCO4 VT1 28 16 EIO3 GT1 1 15 VCCE TIO0 2 14 EIO2B TDIR 3 13 VCCO3 EDIR 4 7 8 9 10 MARKING DIAGRAM 1 10H680 PLCC–28 FN SUFFIX CASE 776 AWLYYWW

ST16C550A

Contextual Info: ST16C550 UART WITH 16-BYTE FIFO’s February 2005 GENERAL DESCRIPTION D4 D3 D2 D1 D0 N.C. VCC -RI -CD -DSR -CTS 6 5 4 3 2 1 44 43 42 41 40 PLCC Package D5 7 39 RESET D6 8 38 -OP1 D7 9 37 -DTR RCLK 10 36 -RTS RX 11 35 -OP2 N.C. 12 34 N.C. TX 13 33 INT CS0 14

ST16C550

Abstract: Code T6S t15d 16-BYTE 16C550 NS16C550 ST16C450 ST16C550CJ44 ST16C550CP40 ST16C550CQ48
Contextual Info: ST16C550 UART WITH 16-BYTE FIFO’s April 2005 GENERAL DESCRIPTION D4 D3 D2 D1 D0 N.C. VCC -RI -CD -DSR -CTS 6 5 4 3 2 1 44 43 42 41 40 PLCC Package D5 7 39 RESET D6 8 38 -OP1 D7 9 37 -DTR RCLK 10 36 -RTS RX 11 35 -OP2 N.C. 12 34 N.C. TX 13 33 INT CS0 14 32

X28C010

Abstract: X28C512 X28C513
Contextual Info: X28C512/X28C513 X28C512/X28C513 512K 64K x 8 Bit 5 Volt, Byte Alterable E2PROM • FEATURES NC 1 32 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 PLCC / LCC 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 X28C512 NC 2 31 WE A15 3 30 NC

footprint plcc 208

Abstract: PLASTIC QUAD FLAT PACK 160 PINS DIMENSION LXT304A LXT305A LXT307 LXT310 LXT317 LXT318 LXT325 A 3120 8 Pins ICs
Contextual Info: Fall 1998 Communication ICs Data Book Table 1: Telecom Product/Packages Product Table 1: Telecom Product/Packages Product Package Package SXT6051 208 QFP SXT6251 208 QFP SXT6282 144-Pin LQFP LXT300Z/301Z 28-Pin DIP and 28-Pin PLCC LXT304A 28-Pin DIP and 28-Pin PLCC

EL1510

Abstract: ISL1535 ISL1571 EL1517B isl1557 EL1506 EL1507 EL1509 EL1526 EL1528
Contextual Info: Communications ICs 4 2008 P RODUCT S ELECTION GUIDE Power Line Communications PLC (pg. 4-3) Line Drivers (pg. 4-3) DSL Line Drivers (pg. 4-2) 10G Ethernet (pg. 4-3) SERDES (pg. 4-4) Voice Over IP (pg. 4-3) Laser Diode Control (pg. 4-4) Communications

89C450

Abstract: PLCC-44 footprint 87C520 89C420 DS87001-F80 PLCC-52 DS87001 TQFP68 footprint plcc 32 tqfp 44 sockets
Contextual Info: DS87001 Microcontroller Programming Adapters www.maxim-ic.com DESCRIPTION The DS87001 family of programming adapters converts the pins of the high-speed microcontroller family in SMT packages to the 40-pin DIP footprint used by most device programmers. The following table details the

4560 SMD 8 PIN

Abstract: 52 PLCC socket pin configuration 84 PLCC socket PLCC socket pin configuration 84 PLCC pin configuration 30f24 plcc 32 socket 28 PLCC socket pin configuration PLCC-32LP PLCC pin configuration
Contextual Info: A Sockets for IC-PLCC 1,27 2,54 0,45 x 0,25 1,27 0,8 A2 D2 C art. no. D E PLCC PLCC PLCC PLCC PLCC PLCC PLCC no. of contacts 20 28 32 44 52 68 84 20 28 32 44 52 68 84 A1 D1 A1 B1 VPE 38 32 28 24 22 18 15 A2 D2 A2 B2 3 8,3 2,54 C A1 5.08 7.62 7.62 12.70 15.24

PZ3064I12A44

Abstract: PZ3064I12BC PZ3064I15A44 PZ3064 PZ3064-10A44 PZ3064-10BC PZ3064-12A44 PZ3064-12BC
Contextual Info: INTEGRATED CIRCUITS PZ3064 64 macrocell CPLD Product specification Supersedes data of 1997 Mar 05 IC27 Data Handbook Philips Semiconductors 1998 Jul 23 Philips Semiconductors Product specification 64 macrocell CPLD PZ3064 FEATURES DESCRIPTION • Industry’s first TotalCMOS PLD – both CMOS design and