PISO REGISTER WITH TRUTH TABLE Search Results

actel PLL schematic

Abstract: 3 phase waveform generator "Waveform Generator" waveform generator FG484 SHREG10 piso register with truth table
Contextual Info: Application Note AC211 32-Channel Waveform Generator Implemented Using Actel's Axcelerator FPGA Introduction Waveform generators are widely used in high-speed applications. A few examples include communication design and test, pulse generation, high-speed, low-jitter data and clock source, and mixed-signal design

C1668

Contextual Info: r Z 7 S C S -T H O M S O N *7 Æ » m m m J B S m m m M 54H C 166 M 74H C 166 8 BIT PISO SHIFT REGISTER • HIGH SPEED fMAX - 50 MHz TYP. at VCc - 5V ■ LOW POWER DISSIPATION ICC - 4 (MAX.) at TA - 25°C ■ HIGH NOISE IMMUNITY Vnih “ Vnil ■ 28% Vcc (MIN.)

M54HC166

Abstract: M54HC166D M54HC166K M54HC166K1
Contextual Info: M54HC166 RAD-HARD 8 BIT PISO SHIFT REGISTER • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 63 MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:

Contextual Info: 5bE D • 7 ^ 2 3 7 0 0 3 ^ 7 M4M ■ SGTH M54HC166 M74HC166 SCS-THOMSON HLUraBSUimiÊi S 6 S-THOHSON 7 1-Lt -C>cl - 0 5 8 BIT PISO SHIFT REGISTER ■ HIGH SPEED *MAX = 50 MHz (TYP. at VCc = 5V ■ LOW POWER DISSIPATION |c c = 4 fJK (MAX.) at TA = 25°C ■ HIGH NOISE IMMUNITY

74LS166

Abstract: M54HC166 M54HC166F1R M74HC166 M74HC166B1R M74HC166C1R M74HC166M1R
Contextual Info: M54HC166 M74HC166 8 BIT PISO SHIFT REGISTER . . . . . . . . HIGH SPEED fMAX = 57 MHz TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE

M74HC166

Abstract: M74HC166B1R M74HC166M1R M74HC166RM13TR M74HC166TTR PO13H TSSOP16
Contextual Info: M74HC166 8 BIT PISO SHIFT REGISTER • ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 63 MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

M74HC166M1R

Abstract: M74HC166 M74HC166B1R M74HC166RM13TR M74HC166TTR PO13H TSSOP16
Contextual Info: M74HC166 8 BIT PISO SHIFT REGISTER • ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 63 MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

54HC

Abstract: 74HC M54HC166 M74HC166
Contextual Info: M54HC166 M74HC166 HS-CMOS" INTEGRATED CIRCUITS ' ? PRELIltflNARY DATA 8 BIT PISO SHIFT REGISTER DESCRIPTION The M54/74HC166 is a high speed C2MOS 8 BIT PISO SHIFT REGISTER fabricated in silicon gate C2MOS technology. It has the same high speed perform ance of LSTTL com bined with true CM OS

M74HC165B1

Contextual Info: M74HC165 8-bit PISO shift register Features • High speed: – tPD = 15 ns typ. at VCC = 6 V ■ Low power dissipation: – ICC = 4 µA (Max.) at TA = 25 °C ■ High noise immunity: VNIH = VNIL = 28 % VCC (Min.) ■ Symmetrical output impedance: |IOH| = IOL = 4 mA (Min)

Contextual Info: r z 7 SGS-THOMSON M54HCT165 M74HCT165 8 BIT PISO SHIFT REGISTER • HIGHSPEED tpD = 17 ns TYP. AT VCC = 5 V ■ LOW POWER DISSIPATION Ice = 4 nA (MAX.) AT T a = 25 °C ■ OUTPUT DRIVE CAPABILITY 10LSTTL LOADS ■ BALANCED PROPAGATION DELAYS tp L H = tP H L

Contextual Info: /= 7 *7Æ. M 54H C 166 M 74H C 166 S G S -T H O M S O N 6SlD ÊISi lllLi(Sî @lii!IB(S§ 8 BIT PISO SHIFT REGISTER • HIGH SPEED fMAX = 50 M H z (TYP. at VCc = 5V ■ LOW POW ER DISSIPATION IC C = 4 f<A (MAX.) at T A = 2 5 °C ■ HIGH NO ISE IM M U N ITY

M74HCT165

Abstract: M74HCT165B1R M74HCT165M1R M74HCT165RM13TR M74HCT165TTR PO13H TSSOP16
Contextual Info: M74HCT165 8 BIT PISO SHIFT REGISTER • ■ ■ ■ ■ ■ HIGH SPEED : tPD = 26ns TYP. at VCC = 4.5V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

Contextual Info: M74HCT165 8 BIT PISO SHIFT REGISTER • ■ ■ ■ ■ ■ HIGH SPEED : tPD = 26ns TYP. at VCC = 4.5V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

Contextual Info: r z 7 S G S -1 H 0 M S 0 N Ä T# M 5 4 H C i 65 M74HC165 8 BIT PISO SH IFT REGISTER • HIGH SPEED tPD = 15 ns TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Icc = 4 |XA (MAX.) AT T a = 25 °C ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS ■ BALANCED PROPAGATION DELAYS

M74HC165RM13TR

Abstract: M74HC165 st 339 JESD97 M74HC165B1R M74HC165TTR TSSOP16
Contextual Info: M74HC165 8-bit PISO shift register Features • High speed: – tPD = 15 ns typ. at VCC = 6 V ■ Low power dissipation: – ICC = 4 A (max.) at TA = 25 °C ■ High noise immunity: VNIH = VNIL = 28 % VCC (Min.) ■ Symmetrical output impedance: |IOH| = IOL = 4 mA (min)

h d 2001

Abstract: M74HC166M1R M74HC166RM13TR M74HC166 M74HC166B1R M74HC166TTR PO13H TSSOP16
Contextual Info: M74HC166 8 BIT PISO SHIFT REGISTER • ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 63 MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

Contextual Info: M74HC165 8-bit PISO shift register Features • High speed: – tPD = 15 ns typ. at VCC = 6 V ■ Low power dissipation: – ICC = 4 µA (max.) at TA = 25 °C ■ High noise immunity: VNIH = VNIL = 28 % VCC (Min.) ■ Symmetrical output impedance: |IOH| = IOL = 4 mA (min)

M74HC165

Abstract: M74HC165B1R M74HC165M1R M74HC165RM13TR M74HC165TTR PO13H TSSOP16
Contextual Info: M74HC165 8 BIT PISO SHIFT REGISTER • ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 15ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

74HC165

Abstract: 74HC165 truth table
Contextual Info: Æ T SGS-THOMSON M54HC165 M74HC165 *7# H0»[i[LI glíl i]0 Í 8-BIT PISO SHIFT REGISTER * HIGH SPEED tpD = 21 ns (TYP. at VCc = 5V • LOW POWER DISSIPATION ICC = 4 mA (MAX.) at TA = 25°C ■ HIGH NOISE IMMUNITY V n i H = V n il = 28% Vcc (MIN.) 1 1 B1N

M54HC165

Abstract: M54HC165D M54HC165D1 M54HC165K M54HC165K1
Contextual Info: M54HC165 RAD-HARD 8 BIT PISO SHIFT REGISTER • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 15ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:

HC165

Abstract: M74HC165RM13TR 74HC165 M74HC165 M74HC165B1R M74HC165M1R M74HC165TTR
Contextual Info: 74HC165 8 BIT PISO SHIFT REGISTER • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 15ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

speedo

Abstract: M54HCT165 M54HCT165F1R M74HCT165 M74HCT165B1R M74HCT165C1R M74HCT165M1R
Contextual Info: M54HCT165 M74HCT165 8 BIT PISO SHIFT REGISTER . . . . . . . HIGH SPEED tPD = 17 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS BALANCED PROPAGATION DELAYS tPLH = tPHL SYMMETRICAL OUTPUT IMPEDANCE

M74HC165B1

Abstract: M74HC165C1R M74HC165 M54HC165 M54HC165F1R M74HC165B1R M74HC165M1R 74HC165 logic diagram
Contextual Info: M54HC165 M74HC165 8 BIT PISO SHIFT REGISTER . . . . . . . . HIGH SPEED tPD = 15 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS BALANCED PROPAGATION DELAYS tPLH = tPHL SYMMETRICAL OUTPUT IMPEDANCE

M74HC165

Abstract: M74HC165B1R M74HC165M1R M74HC165RM13TR M74HC165TTR PO13H TSSOP16
Contextual Info: M74HC165 8 BIT PISO SHIFT REGISTER • ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 15ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)