PINOUT Search Results

54HC573

Contextual Info: SN54HC573, SN74HC573 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS D26B4. DECEMBER 1982-REVISED SEPTEMBER 1987 • High-Current 3-State Output Drive Bus-Lines Directly or Up to 15 LSTTL Loads • Bus-Structured Pinout Package Options Include Plastic "Small

56DL

Abstract: SN74AS841
Contextual Info: TYPES SN54ALS841, SN54AS841, SN54ALS842, SN54AS842 SN74ALS841, SN74AS841, SN74ALS842, SN74AS842 10-BIT BUS INTERFACE D TYPE LATCHES WITH 3 STATE OUTPUTS D 2 8 2 5 , DECEMBER 1983 • 3-State Buffer-Type Outputs Drive Bus-Lines Directly • Bus-Structured Pinout

Contextual Info: UT54 ACS 153/UT54ACTS153 Radiation-Hardened Quadruple 4 to 1 Multiplexers PINOUTS FEATURES • 16-Pin D IP Top View 1.2n radiation-hardened CMOS - Latchup immune High speed Low power consumption Single 5 volt supply Available QM L Q o r V processes Flexible package

Contextual Info: U T 5 4 A C S 151 / U T 5 4 A C T S 151 Radiation-Hardened 1 of 8 Data Selectors/Multiplexers PINOUTS FEATURES 16-Pin DIP Top View • 8-line to 1-line multiplexers can perform as -Boolean function generators, parallel-to-serial converters, and data source selectors

Contextual Info: SN54HC132, SN74HC132 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS034B - DECEMBER 1982 - REVISED JANUARY 1996 • • • • • Operation From Very Slow Input Transitions Temperature-Compensated Threshold Levels High Noise Immunity Same Pinouts as ’HCOO

Contextual Info: SCDS002C - NOVEMBER 1992 - REVISED MAY 1995 DB, DW, OR PW PACKAGE TOP VIEW Functionally Equivalent to QS3245 Standard '245-Type Pinout 5-iî Switch Connection Between Two Ports NC [ 1 A1 [ 2 TTL-Compatible Control Input Levels A2 [ 3 A3 [ 4 A4 [ 5 Package Options Include Shrink

bd 9d

Abstract: SN74ALS29841
Contextual Info: SN74ALS29841 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS S D A S 1 4 9 A - JU N E 1 9 8 8 - REVISED JA N U A R Y 1995 3-State Buffer-Type Outputs Drive Bus Lines Directly DW OR NT PACKAGE TOP VIEW Bus-Structured Pinout m Provides Extra Bus-Driving Latches

L78015

Contextual Info: TL780 SERIES POSITIVE VOLTAGE REGULATORS SLVS055B - APRIL 1981 - REVISED AUGUST 1995 • ±1% Output Tolerance at 25°C • +2% Output Tolerance Over Full Operating Range • Thermal Shutdown • Internal Short-Circuit Current Limiting • Pinout Identical to |jA7800 Series

Contextual Info: UT54ACS 139/UT54ACTS 139 Radiation-Hardened Dual 2-Line to 4-Line Decoders/Demultiplexers PINOUTS FEATURES 16-Pin DIP Top View • Incorporates two enable inputs to simplify cascading and/or data reception • 1.2 1 radiation-hardened CMOS - Latchup immune

CT674

Abstract: 54HCT574
Contextual Info: SN54HCT574, SN74HCT574 OCTAL D TYPE EDGE TRIGGERED FLIP FLOPS WITH 3 STATE OUTPUTS D 2804. M A R C H • Inputs are TTL-Voltage Compatible • High-Current 3-State Noninverting Outputs Drive Bus-Lines Directly or Up to 15 LSTTL Loads Bus-Structured Pinout

VJ24

Abstract: ALS29841 SN74ALS29841
Contextual Info: SN74ALS29841 10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS D307B, JU N E 1988- REV ISED M A R C H 1990 • 3-State Buffer-Type Output* Drive Bus-Llne» SN7«Aj.S2#84i. DW 0« n t package TOP VIEW Directly • • Bus-Structured Pinout Provide Extra But Driving Latches

74AC11873

Contextual Info: 54AC11873, 74AC11873 DUAL 4-BIT D-TYPE LATCHES WITH 3-STATE OUTPUTS • 54A C 11 8 73 . . . J T P A C K A G E 3-State Buffer-Type Outputs Drive Bus 74AC 11B73 . . . D W OR N T P A C K A G E Lines Directly TOP V IE W • Bus-Structured Pinout • Flow -Through A rchitecture O ptim izes PCB

Contextual Info: SN74ALS996 8 BIT D T Y P E EDG E TRIGGERED READ BACK LATC HES ADVANCE INFORMATION D 2 8 5 4 , OCTOBER 1 9 8 4 -R E V IS E D JA N U A R Y 1 9 8 6 • 3-State l/O-Type Read-Back Inputs • Bus-Structured Pinout • D W OR N T P AC K A G E TO P V IE W 1 ^2 4 3

Contextual Info: OJ bq4014/bq4014Y UNITRODE- 256Kx8 Nonvolatile SRAM Features > Data retention in the absence of power > Automatic write-protection dur­ ing power-up/power-down cycles >• Industry-standard 32-pin 256K x 8 pinout >• Conventional SEAM operation; unlimited write cycles

T573

Abstract: IN3027
Contextual Info: SN54HCT573, SN74HCT573 OCTAL D TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS D 2 8 0 4 , M AR C H 1 9B 4 —REVISED SEPTEMBER 1987 • Inputs are TTL Voltage Compatible • High-Current 3-State Output Drive Bus-Lines Directly or Up to 15 LSTTL Loads • Bus-Structured Pinout

Contextual Info: SN74ALS994, SN74ALS995 10-BIT O-TYPE TRANSPARENT READ-BACK LATCHES D 2 8 5 6 , O C TO B E R 1 9 8 4 - R E V IS E D J A N U A R Y 1 9 8 6 SN 74A LS994 . . . 3-S tate l/O-Type Read-Back Inputs D W OR N T PA CKAG E T O P V IE W Bus-Structured Pinout OERB E 1

a155d

Contextual Info: UT54ACS190/UT54ACTS190 Radiation-Hardened Synchronous 4-Bit Up-Down BCD Counters FEATURES PINOUTS • Single down/up count control line • Look-ahead circuitry enhances speed of cascaded counters • Fully synchronous in count modes • Asynchronously presettable with load control

Contextual Info: SN54F541, SN74FS41 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS 03126, JANUARY 1989 Data Flow-Through Pinout All Inputs on Opposite Side from Outputs (TOP VIEW) 51 C A id A2 C A3 C A4 C Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers,

75SSS

Contextual Info: SN54ALS573C, SN54AS573A, SN74ALS573C, SN74AS573A OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS SDAS048D- DECEMBER 1989 - REVISED JANUARY 1996 • 3-State Buffer-Type Outputs Drive Bus Lines Directly • Bus-Structured Pinout • True Logic Outputs

Contextual Info: Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY29FCT520T Multi-Level Pipeline Register SCCS011 - May 1994 - Revised February 2000 Features Functional Description • Function, pinout, and drive compatible with FCT, F

UNITRODE

Contextual Info: bq4014/bq4014Y 256Kx8 Nonvolatile SRAM Features ➤ Data retention in the absence of power ➤ Automatic write-protection during power-up/power-down cycles ➤ Industry-standard 32-pin 256K x 8 pinout ➤ Conventional SRAM operation; unlimited write cycles

Contextual Info: SN54ALS541, SN74ALS540, SN74ALS541 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDAS025C – APRIL 1982 – REVISED JANUARY 1995 • • • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers pnp Inputs Reduce dc Loading Data Flow-Through Pinout All Inputs on

HCT04AG

Abstract: LS04
Contextual Info: MC74HCT04A Hex Inverter With LSTTL−Compatible Inputs High−Performance Silicon−Gate CMOS The MC74HCT04A may be used as a level converter for interfacing TTL or NMOS outputs to High−Speed CMOS inputs. The HCT04A is identical in pinout to the LS04. http://onsemi.com

Contextual Info: DC/DC Converters TEL 15 Series, 15 Watt CB Scheme Features ◆ High efficiency up to 86 % ◆ Operating temperature range UL 60950-1 –40°C to +71°C ◆ Indefinite short-circuit protection ◆ I/O isolation 1500 VDC ◆ Industry standard pinout ◆ Cost optimized design