PHL 7S Search Results

Contextual Info: INTEL CORP UP/PR PHL S 44E D E3 4ö2bl7S 0104S11 2 E3ITL1 [P G & flG Ä » 87C196KB/87C198KB16 HIGH PERFORMANCE CHMOS MICROCONTROLLER 8 Kbytes of On-Chip EPROM 232 Byte Register File Dynamically Configurable 8-Blt or 16-Bit Buswidth Register-to-Register Architecture

Contextual Info: SN54AHC157, SN74AHC157 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS SCLS345 - MAY 1996 Operating Range 2-V to 5.5-V Vcc EPIC Enhanced-Performance Implanted CMOS Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outllne

54AC11181

Abstract: TI018
Contextual Info: 54AC11181, 74AC11181 ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS T I0184— D 3119, APRIL 1989— REVISED MARCH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11181 . . . JT PACKAGE 74AC11181 . . . DW OR NT PACKAGE TOP VIEW Minimize High-Speed Switching Noise

74ACT11181

Contextual Info: I 31E D TEXAS INSTR LOGIC • ^(31723 DQflflbS? fi ■ T I I 3 54ACT11181, 74ACT11181 ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS T-MQ-I/-00 TI0183— D3200, OCTO BER 1989—REVISED M AR C H 1990- 54ACT11fS1 . . . JT PACKAGE 74A C T 11181 . . . DW O R NT PACKAGE

sn74als662

Abstract: sn74als663 sn74als662a SN74ALS853 2114D
Contextual Info: SN54ALS652, SN54A LS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066E - DECEMBER 1983 - REVISED JANUARY 1995 Bus Transceivers/Registers Independent Registers and Enables for

PHL 7S

Abstract: 74F622
Contextual Info: Signetics FAST 74F621, 74F622 Transceivers FAST Products 74F621 Octal Bus Transceiver, Non-Inverting Open Collector 74F622 Octal Bus Transceiver, Inverting (Open Collector) Product Specification FEATURES • High Impedance NPN bas* inputs for reduced loading (20^A In High

DM 311 BG

Abstract: DM 311 BG 40 BP2326 SN54FB2032 SN74FB2032 DM 311 BG 29
Contextual Info: SN54FB2032, SN74FB2032 9-BIT TTUBTL COMPETITION TRANSCEIVERS SCBS175B - NOVEMBER 1991 - REVISED APRIL 1994 Compatible With IEEE 1194.1-1991 BTL and IEEE 896.2-1991 (Futurebus+) Standards TTL A Port, Backplane Transceiver Logic B Port Open-Collector B-Port Outputs Sink 100 mA

PHL 7S

Abstract: 74als666
Contextual Info: SN74ALS666, SN74ALS667 8-BIT D-TYPE TRANSPARENT READ-BACK LATCHES WITH 3-STATE OUTPUTS SDAS227A-J U N E 1964-R E V IS E D JANUARY 1995 3-State l/O-Type Read-Back Inputs Bus-Structured Pinout Choice of True or Inverting Logic - SN74ALS666. . . True Outputs

mc140238

Abstract: MC14024B
Contextual Info: MC140238 See Page 6-5 MOTOROLA MC14023UB See Page 6-14 7-STAGE RIPPLE COUNTER MC14024B T h e M C 14024B is a 7-stage rip ple counter w ith short propagation delays and high m a x im u m clock rates. The Reset input has standard noise im m u ­ nity, h o w ever the Clock input has increased noise im m u n ity due to Hys­

7129 equivalent IC

Abstract: 9N74 SN74S136
Contextual Info: TTL MSI TYPES SNS4S13S, SN74S13S QUADRUPLE EXCLUSIVEOR/NOR GATES B U L L E T I N N O . D L-S 721 18 26 . D E C E M B E R 1972 • Fully Compatible with Most T T L and T T L MSI Circuits • Fu lly Schottky Clamping Reduces Delay Tim es . . . 8 ns Typical •

7SJ66

Abstract: T573
Contextual Info: SN54AHCT573, SN74AHCT573 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS _SCLS243D - OCTOBER 1995 - REVISED APRIL 1996 Inputs Are TTL-Voltage Compatible SN54AHCT573 . . . J OR W PACKAGE SN74A HC T673. . . DB, DW, N, OR PW PACKAGE TOP VIEW

sn74181

Abstract: 7B222 SN74LS1S1 SN741S1
Contextual Info: TYPES Sttfi4H1, SN54LS181, SKS4SH1. TTL MSI s m tm su m s« « , s i m i ARITHMETIC LOGIC UNITS/FUNCTION GENEftATOftS B U LLE TIN NO. DL-S 7611831. DECEMBER 197» - REVISED OCTOBER 1976 SN841B1, SN54LS1S1, SN54S181 . . . J OR W PACKAGE SN741S1, SN74LS1S1.8N74S181 . . . J O H N PACKAGE

Contextual Info: SN54AHCU04, SN74AHCU04 HEX INVERTERS SCLS234A - OCTOBER 1995 - REVISED MARCH 1996 SN54AHCU04 . . . J OR W PACKAGE SN74AHCU04. . . D, DB, N OR PW PACKAGE TOP VIEW Operating Range 2-V to 5.5-V V^c EPIC (Enhanced-Performance Implanted CMOS) Process Unbuffered Outputs

Contextual Info: SN54ALS874B, SN74ALS874B, SN74ALS876A SN74AS874, SN74AS876 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS SDAS061C - APRIL 1982 - REVISED JANUARY 1995 SN54ALS874B. . . JT PACKAGE SN74ALS874B, SN74AS874 . . . DW OR NT PACKAGE TOP VIEW • 3-State Buffer-Type Outputs Drive Bus

SN54ALS181

Abstract: MSI01
Contextual Info: SN54ALS161B, SN54ALS162B, SN54ALS163B, SN54AS161, SN54AS163 SN74ALS161B, SN74ALS163B, SN74AS161, SN74AS163 SYNCHRONOUS 4-BIT DECADE AND BINARY COUNTERS _ SDAS276 - DECEM BER 1994 Internal Look-Ahead Circuitry for Fast Counting SN54ALS161B, SN54ALS162B, SN54ALS163B, SN54AS161,

s205A

Contextual Info: SN54ALS151, SN74ALS151, SN74AS151 1-0F-8 DATA SELECTORS/MULTIPLEXERS S D A S 205A - APRIL 1 9 8 2 - REVISED DECEMBER 1994 8-Line to 1-Line Multiplexers Can Perform as: Boolean Function Generators Parallel-to-Serial Converters Data Source Selectors Input Clamping Diodes Simplify System

Contextual Info: P54/74FCT3157C/D — P54/74FCT3158C/D 3.3 VOLT DATA SELECTOR/MULTIPLEXER FEATURES • Function and Drive Compatible with the Fastest TTL Logic ■ Inputs and Outputs Interface with TTL Logic Levels ■ 3.3V + 0.2V Power Supply and CMOS for Lowest Power Dissipation

Contextual Info: SN54ALS257, SN54ALS258, SN74ALS257A, SN74ALS258A, SN74AS257, SN74AS258 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS SDAS124B - APRIL 1982 - REVISED DECEMBER 1994 3-State Outputs Interface Directly With System Bus Provide Bus Interface From Multiple

74ls546

Abstract: 74ls547
Contextual Info: 8-B it Bus Register Transceivers and Latch Transceivers SN54/74LS546 SN54/74LS566 SN54/74LS547 SN54/74LS567 Features/ Benefits Description • Bidirectional transceivers utilizing registers or latches These devices are comprised of a pair of 8-bit registers ’LS546,

dps 298 cp 2

Abstract: ic xc 7270 xc 7270 dps 298 cp dps 298 cp 4 dps 298 PHL 218 dps 298 cp 9
Contextual Info: ^ ^'^£xjìtÌÈtÈÌÌÈÌÙttmtÈÈÌÈB6àtitilitéimiln^ÈàiÙÈtmii61' f r VriiiVHTi iffglr^-irTl* ïr/'ïiir InitfrifcrfW’ Tffr i tTiiWl GOLDSTAR TECHNOLOGY 4028757 GOLDSTAR TECHNOLOGY INC. INC-. DME Î T | L»D2fl7S7~ü00:iia7S =1 | 04E 0 1 8 7 5

Contextual Info: TEXAS INSTR LOGIC SSE D • 5 ^ 1 7 2 3 QQfl3SQD S ■ SN54ALS874B, SN54ALS876A, SN54AS874, SN54AS876 SN74ALS874B, SN74ALS876A, SN74AS874, SN74AS876 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS 02661, APRIL 1982 - REVISED M AY 1986 SN54ALS874B. S N S 4 A S 8 7 4 _ IT PACKAGE

Contextual Info: SN54ALS191, SN74ALS191A SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS SDAS210B-DECEMBER 1982-REVISED DECEMBER 1994 • Single Down/Up Count-Control Line • Look-Ahead Circuitry Enhances Speed of Cascaded Counters • Fully Synchronous In Count Modes • Asynchronously Presettable With Load

7448 ic diagram

Abstract: encoder 7448 7448 IC application 7448 p ic ttl ic 7448
Contextual Info: TYPES SN54LS349, SN74LS348 TIM9908 8-LINE-T0-3-LIME PRIORITY ENCODERS WITH 3-STATE OUTPUTS ITTL MSI _ B U L L E T I N M O . D l - S 7 7 1 2 4 8 9 . O C T O B E R 1 9 7 6 - B 1 V IS E D A U G U S T 1977 SN64LS3«. . . J O tt «I PACKAGE 3-State Outputs Drive But Line* Directly

ALS640B

Abstract: als645a AS640 als641a SN54ALS640B SN54ALS645A SN54AS640 SN54AS645 SN74ALS641A SN74ALS645A
Contextual Info: ISN74ALS640B, SN74ALS641A, SN74ALS642A, SN74ALS645A, SN74AS640. SN74AS641, SN74AS645 SN54ALS640B, SN54ALS645A, SN54AS640, SN54AS645 OCTAL BUS TRANSCEIVERS 02661, DECEMBER 1983- REVISED APRIL 1987 Bidirectional Bus Transceivers in HighDensity 20-Pin Packages