PPD485505 Search Results

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Contextual Info: 9 MOS INTEGRATED CIRCUIT pPD485505 LINE BUFFER 5K-WORD BY 8-BIT Description The ,~PD485505 is a 5,048 words by 8 bits high speed FIFO First In First Out line buffer. its CMOS static circuitry provides high speed access and low power consumption. The pPD485505 can be used for one line delay and time axis conversion in high speed facsimile machines and

Contextual Info: SONY CXD2442Q Timing Generator for LCD Panels Description The CXD2442Q is a timing signal generator for the SVGA LCD panel LCX016 and VGA LCD panel LCX012BL driver. This chip has a built-in serial interface circuit which supports various SVGA and VGA signals as well as double-speed NTSC and

Contextual Info: SONY CXD2443Q Timing Generator for LCD Panels Description The CXD2443Q is a timing generator for the LCD panel LCX011 and LCX019 driver. This chip has a built-in serial interface circuit which allows various settings to be performed through external control

Contextual Info: JIPD485505 Line Buffer for Communications Systems \0 NEC Electronics Inc. Description Pin Configurations The ¿/PD485505 is a 5048-word by 8-bit dual-port line bu ffe r fa b rica te d w ith a silicon-gate CMOS process. The device is capable o f asynchronous read and w rite

D485505

Abstract: ax253
Contextual Info: m b427S2S 0035734 EMfl JJPD485505 Line Buffer for Communications Systems INECE NEC Electronics Inc. Preliminary Information_ A ugust 1992 N E C ELECTRONICS INC Description Pin Configurations The ¿/PD485505 is a 5048-word by 8-bit d ual-port line buffer fab ric a te d with a silicon-gate CM O S process.

D485505

Abstract: PD485505G-25
Contextual Info: DATA SHEET M O S INTEGRATED CIRCUIT /¿P D 4 8 5 5 0 5 LINE BUFFER 5K-WORD BY 8-BIT Description The fiPD485505 is a 5 048 words by 8 bits high speed FIFO First In First Out line buffer. Its CMOS static circuitry provides high speed access and low power consumption.

xa310

Abstract: PLLP10
Contextual Info: SONY CXD2464R Timing Generator for LCD Panels Description The CXD2464R is a timing signal generator for driving the LCX026, LCX016 and LCX012BL LCD panels. This chip has a built-in serial interface circuit which supports various XGA, SVGA and VGA signals,

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Contextual Info: AUG l i 1992 SEC NEC Electronics Inc. fiPD485505 Line Buffer for Communications Systems Preliminary Information August 1992 Description Pin Configurations The /UPD485505 is a 5048-word by 8-bit dual-port line buffer fabricated with a silicon-gate CMOS process.

Contextual Info: SONY CXD2442Q Timing Generator for LCD Panels Description 80 pin QFP Plastic The CXD2442Q is a timing signal generator for the SVGA LCD panel LCX016 and VGA LCD panel LCX012BL driver. This chip has a built-in serial interface circuit which supports various SVGA and

Contextual Info: DATA SHEET NEC / MOS INTEGRATED CIRCUIT _ / / P D 4 8 5 5 0 5 LINE BUFFER 5K-WORD BY 8-BIT Description The iiPD485505 is a 5,048 words by 8 bits high speed FIFO First In First Out line buffer. Its CMOS static circuitry provides high speed access and low power consumption.