M54HCT27
Abstract: M54HCT27F1R M74HCT27 M74HCT27B1R M74HCT27C1R M74HCT27M1R
Contextual Info: M54HCT27 M74HCT27 TRIPLE 3-INPUT NOR GATE . . . . . . . HIGH SPEED tPD = 9 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE
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m54hct27m74hct2754/74ls27m54/74hct27+4m54hct27f1rm74hct27b1rm74hct27c1rm74hct27m1r
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M54HC393
Abstract: M54HC393F1R M74HC393 M74HC393B1R M74HC393C1R M74HC393M1R M74HC393B1 74LS393 equivalent
Contextual Info: M54HC393 M74HC393 DUAL BINARY COUNTER . . . . . . . . HIGH SPEED fMAX = 72 MHz TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE
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m54hc393m74hc39354/74ls393m54hc393f1r+6m74hc393m1rm74hc393b1rm74hc393c1rm54/74hc393m74hc393b174ls393 equivalent
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74HC4078
Abstract: 4078B M54HC4078 M54HC4078F1R M74HC4078 M74HC4078B1R M74HC4078C1R M74HC4078M1R
Contextual Info: M54HC4078 M74HC4078 8 INPUT NOR/OR GATE . . . . . . . . HIGH SPEED tPD = 13 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE
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m54hc4078m74hc40784078bm54hc4078f1r+5m74hc4078m1rm74hc4078b1rm74hc4078c1rm54/74hc407874hc4078
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74LS20 ic
Abstract: M54HC20 M54HC20F1R M74HC20 M74HC20B1R M74HC20C1R M74HC20M1R 74Ls20 truth table
Contextual Info: M54HC20 M74HC20 DUAL 4-INPUT NAND GATE . . . . . . . . HIGH SPEED tPD = 8 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE
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m54hc20m74hc2054/74ls20m54hc20f1r+6m74hc20m1rm74hc20b1rm74hc20c1rm54/74hc2074ls20 ic74ls20 truth table
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OC211
Abstract: M74HC4066B1 4066B M54HC4066 M54HC4066F1R M74HC4066 M74HC4066B1R M74HC4066C1R M74HC4066M1R CI 74HC4066
Contextual Info: M54HC4066 M74HC4066 QUAD BILATERAL SWITCH . . . . . . . HIGH SPEED tPD = 7 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) LOW ”ON” RESISTANCE RON = 50 Ω (TYP.) AT VCC = 9 V, II/O = 100 µA
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m54hc4066m74hc40664066bm54hc4066f1r+7m74hc4066m1rm74hc4066b1rm74hc4066c1rm54/74hc4066oc211m74hc4066b1ci 74hc4066
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74LS02 gate diagram
Abstract: IC 74LS02 M54HCT02 M54HCT02F1R M74HCT02 M74HCT02B1R M74HCT02C1R M74HCT02M1R
Contextual Info: M54HCT02 M74HCT02 QUAD 2-INPUT NOR GATE . . . . . . . HIGH SPEED tPD = 11 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE
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m54hct02m74hct0254/74ls02m54/74hct02+674ls02 gate diagramic 74ls02m54hct02f1rm74hct02b1rm74hct02c1rm74hct02m1r
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74ls72
Abstract: IC 74hc266 74LS7266 HC266 data sheet IC 74hc266 HC7266 M54HCXXXF1R 74HC266 M74HCXXXC1R M74HCXXXB1R
Contextual Info: M54/74HC266 M54/74HC7266 HC266 QUAD EXCLUSIVE NOR GATE WITH OPEN DRAIN HC7266 QUAD EXCLUSIVE NOR GATE . . . . . . . . HIGH SPEED tPD = 10 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.)
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m54/74hc266m54/74hc7266hc266hc7266+1054/74ls7266m54hcxxxf1rm74hcxxx1rm74hcxxxb1rm74hcxxxc1r74ls72ic 74hc26674ls7266data sheet ic 74hc26674hc266
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74LS02 gate diagram
Abstract: M54HCT02 M54HCT02F1R M74HCT02 M74HCT02B1R M74HCT02C1R M74HCT02M1R
Contextual Info: M54HCT02 M74HCT02 QUAD 2-INPUT NOR GATE . . . . . . . HIGH SPEED tPD = 11 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE
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m54hct02m74hct0254/74ls02m54/74hct02+574ls02 gate diagramm54hct02f1rm74hct02b1rm74hct02c1rm74hct02m1r
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4066B
Abstract: M54HC4066 M54HC4066F1R M74HC4066 M74HC4066B1R M74HC4066C1R M74HC4066M1R M74HC4066B1
Contextual Info: M54HC4066 M74HC4066 QUAD BILATERAL SWITCH . . . . . . . HIGH SPEED tPD = 7 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) LOW ”ON” RESISTANCE RON = 50 Ω (TYP.) AT VCC = 9 V, II/O = 100 µA
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m54hc4066m74hc40664066bm54hc4066f1r+5m74hc4066m1rm74hc4066b1rm74hc4066c1rm54/74hc4066m74hc4066b1
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M54HC280
Abstract: M54HC280F1R M74HC280 M74HC280B1R M74HC280C1R M74HC280M1R 74hc280
Contextual Info: M54HC280 M74HC280 9 BIT PARITY GENERATOR . . . . . . . . HIGH SPEED tPD = 22 ns TYP. at VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) at TA = 25 °C 6 V HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE
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m54hc280m74hc28054/74ls280m54hc280f1r+5m74hc280m1rm74hc280b1rm74hc280c1rm54/74hc28074hc280
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HC4024
Abstract: M74HC4024B1R 4024B with truth table 4024B M54HC4024 M54HC4024F1R M74HC4024 M74HC4024C1R M74HC4024M1R
Contextual Info: M54HC4024 M74HC4024 7 STAGE BINARY COUNTER . . . . . . . . HIGH SPEED tPD = 13 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25° C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE
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m54hc4024m74hc40244024bm54hc4024f1r+6m74hc4024m1rm74hc4024b1rm74hc4024c1rm54/74hc4024hc40244024b with truth table
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HCF4541
Abstract: HCF4541 timer HCF4541BEY HCF4541B HCC4541B
Contextual Info: HCC4541B HCF4541B PROGRAMMABLE TIMER 16 STAGE BINARI COUNTER LOW SYMMETRICAL OUTPUT RESISTANCE, TYPICALLY 100 OHM AT VDD = 15V OSCILLATOR FREQUENCY RANGE : DC TO 100kHz AUTO OR MASTER RESET DISABLES OSCILLATOR DURING RESET TO REDUCE POWER DISSIPATION OPERATES WITH VERY SLOW CLOCK RISE
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hcc4541bhcf4541b100khzhcf4541+2hcf4541 timerhcf4541bey
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CI 4071B
Abstract: 4072B 4075B 4071B cmos 4072B pin connections of 4075b
Contextual Info: HCC4071B/72B/75B HCF4071B/72B/75B OR GATE 4071B - QUAD 2–INPUT OR GATE 4072B - QUAD 4–INPUT OR GATE 4075B - TRIPLE 3–INPUT OR GATE . . . . MEDIUM-SPEED OPERATION tPLH, tPHL = 60ns. typ. AT VDD = 10V QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE
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hcc4071b/72b/75bhcf4071b/72b/75b4071b4072b+94075b100nahcc40xxbfhcf40xxbm1hcf40xxbeyhcf40xxbc1ci 4071bcmos 4072bpin connections of 4075b
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triac b 978
Abstract: HCF40107BM1 40107B HCC40107B HCC40107BF HCF40107B HCF40107BC1 HCF40107BEY P013M TOP214
Contextual Info: HCC/HCF40107B DUAL 2-INPUT NAND BUFFER/DRIVER . . . . 32 TIMES STANDARD B-SERIES OUTPUT CURRENT DRIVE SINKING CAPABILITY – 136mA TYP. @ VDD = 10V, VDS = 1V QUIESCENT CURRENT SPECIFIED AT 20V FOR HCC DEVICE 5V, 10V, AND 15V PARAMETRIC RATINGS INPUT CURRENT OF 100nA AT 18V AND 25°C
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hcc/hcf40107b136ma100nahcc40107bf+10hcf40107bm1hcf40107beyhcf40107bc1hcc40107bhcf4010setriac b 97840107bhcf40107bp013mtop214
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DD 127 D TRANSISTOR
Abstract: DD 127 transistor HCF4016BE HCC4016B HCC4016BF HCF4016B HCF4016BC1 HCF4016BEY HCF4016BM1 DD 127 D
Contextual Info: HCC/HCF4016B QUAD BILATERAL SWITCH . . . . . . . . . . . . . 20V DIGITAL OR ± 10V PEAK-TO-PEAK SWITCHING 280Ω TYPICAL ON RESISTANCE FOR 15V OPERATION SWITCH ON RESISTANCE MATCHED TO WITHIN 10Ω TYP. OVER 15V SIGNAL INPUT RANGE HIGH ON/OFF OUTPUT-VOLTAGE RATIO :
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hcc/hcf4016b10khz100padd 127 d transistor+9dd 127 transistorhcf4016behcc4016bhcc4016bfhcf4016bhcf4016bc1hcf4016beyhcf4016bm1dd 127 d
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M54HC30
Abstract: M54HC30F1R M74HC30 M74HC30B1R M74HC30C1R M74HC30M1R
Contextual Info: M54HC30 M74HC30 8 INPUT NAND GATE . . . . . . . . HIGH SPEED tPD = 12 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE
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m54hc30m74hc3054/74ls30m54hc30f1r+4m74hc30m1rm74hc30b1rm74hc30c1rm54/74hc30
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4023B
Abstract: 4012B hfc4011b HCF Family HCC4011B HCC4012B 4011B ci 4011B hfc4011
Contextual Info: HCC4011B/12B/23B HCF4011B/12B/23B NAND GATES QUAD 2 INPUT HCC/HCF 4011B DUAL 4 INPUT HCC/HCF 4012B TRIPLE 3 INPUT HCC/HCF 4023B . . . . . PROPAGATION DELAY TIME = 60ns typ. AT CL = 50pF, VDD = 10V BUFFERED INPUTS AND OUTPUTS QUIESCENT CURRENT SPECIFIED TO 20V
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hcc4011b/12b/23bhcf4011b/12b/23b4011b4012b+104023b100nahcc4011bhcc4012bhcc4023bhcf4011bhfc4011bhcf familyci 4011bhfc4011
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M74HC86
Abstract: M54HC86 M54HC86F1R M74HC86B1R M74HC86C1R M74HC86M1R
Contextual Info: M54HC86 M74HC86 QUAD EXCLUSIVE OR GATE . . . . . . . . HIGH SPEED tPD = 10 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE
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m54hc86m74hc8654/74ls86m54hc86f1r+4m74hc86m1rm74hc86b1rm74hc86c1rm54/74hc86
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74HC10
Abstract: M54HC10 M54HC10F1R M74HC10 M74HC10B1R M74HC10C1R M74HC10M1R 74HC10 equivalent
Contextual Info: M54HC10 M74HC10 TRIPLE 3-INPUT NAND GATE . . . . . . . . HIGH SPEED tPD = 6 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE
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m54hc10m74hc1054/74ls10m54hc10f1r+6m74hc10m1rm74hc10b1rm74hc10c1rm54/74hc1074hc1074hc10 equivalent
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M74HC00B1
Abstract: M74HC00M1R 74hc00 gate M74HC00 M74HC00B1R 74LS00 74HC00 M54HC00 M54HC00F1R M74HC00C1R
Contextual Info: M54HC00 M74HC00 QUAD 2-INPUT NAND GATE . . . . . . . . HIGH SPEED tPD = 6 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUTS DRIVE CAPABILITY 10 LSTTL LOADS BALANCED PROPAGATION DELAYS
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m54hc00m74hc0054/74ls00m54hc00f1r+8m74hc00m1rm74hc00b1rm74hc00c1rm54/74hc00m74hc00b174hc00 gate74ls0074hc00
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sm 889
Abstract: HCF4030B
Contextual Info: /IT SGS-1H0MS0N * 7 # R n ie r a « H C C /H C F 4 0 3 0 B QUAD EXCLUSIVE-OR GATE > MEDIUM-SPEED OPERATION - tpm = tpm = 60ns typ. @ C l = 50pF and V dd - V ss = 1 0V . LOW OUTPUT IMPEDANCE : 50QQ (typ.) @ V dd —Vss = 10V . QUIESCENT CURRENT SPECIFIED TO 20V
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100naand25hcc403cbfhcf4030+5p013ghcc/hcf4030bplcc20sm 889hcf4030b
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Q1 BC 558 transistor
Abstract: specification of transistor bc 558
Contextual Info: r Z 7 SGS-THOMSON ^ 7 # Hll Ê[R!@ lllLiOT iD(Bi HCC40105B HCF40105B FIFO REGISTER . INDEPENDENT ASYNCHRONOUS INPUTS AND OUTPUTS . 3-STATE OUTPUTS • EXPANDABLE IN EITHER DIRECTION ■ STATUS INDICATORS ON INPUT AND OUT PUT ■ RESET CAPABLITY . STANDARDIZED, SYMMETRICAL OUTPUT
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hcc40105bhcf40105b100nap053c+6ddbb733hcc/hcf40105bplcc2071e1237q1 bc 558 transistorspecification of transistor bc 558
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DD 127 D transistor
Abstract: HCF4041 sm 889 HCF4041UB
Contextual Info: F Z 7 “ 7 # S G S -T H O M S O N R BJSTriliGKES HCC/HCF4041UB QUAD TRUE/COMPLEMENT BUFFER . BALANCED SINK AND SOURCE CURRENT ; APPROXIMATELY 4 TIMES STANDARD ”B” DRIVE • EQUALIZED DELAY TO TRUE AND COMPLE MENT OUTPUTS . QUIESCENT CURRENT SPECIRED TO 20V
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hcc/hcf4041ubhcc4041bfhcf4041hcf4041bm1+7hcf4041bc100bb324plcc200dbb325dd 127 d transistorsm 889hcf4041ub
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M54HC280
Abstract: M54HC280F1R M74HC280 M74HC280B1R M74HC280C1R M74HC280M1R
Contextual Info: M54HC280 M74HC280 9 BIT PARITY GENERATOR . . . . . . . . HIGH SPEED tPD = 22 ns TYP. at VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) at TA = 25 °C 6 V HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE
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m54hc280m74hc28054/74ls280m54hc280f1r+4m74hc280m1rm74hc280b1rm74hc280c1rm54/74hc280
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