OUTPUT VOLTAGE RANGES OF A LDR Search Results

CdSe LDR

Abstract: NSL 32 LDR NSL-4960 NSL-19M51 NSL-7910 photoconductive cells NORPS-12 ldr 30K LDR cdse NSL21UV
Contextual Info: 1746-2012:QuarkCatalogTempNew 9/17/12 5:03 PM Page 1746 TEST & MEASUREMENT 20 Photo IC, Photodiode, Photoconductive Cells and Analog Optocouplers 10 and 20 mm Panel Mount Light Sensors RoHS V Vcc Vcc LDR A/D Current Amp OUT To ADC INTERCONNECT RL NSL-37V81

BC5AA

Contextual Info: jcfty IntegratedDeviceTechnoiogy,Inc processor and peripheral. With access speed of 35ns, the BiFlFO can improve system performance of the peripheral interface by vir­ tue of its concurrent transfer capability. The BiFlFO can handle data transfer between 16-bit to 16-bit or 32-blt to 32-bit buses.

IGSA

Contextual Info: PRELIMINARY V VANTI S I BEYOND PERFORM ANCE COM'L: -7/10/12/15 IND: -10/12/14/18 M A C H 4 -1 9 2 /M A C H 4 LV -1 9 2 High-Performance EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦

UNUSED21

Abstract: 6420H IDT72511 IDT72521
Contextual Info: IDT72511 IDT72521 PARALLEL BIDIRECTIONAL FIFO 512 x 18 & 1024 x 18 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • Two side-by-side FIFO memory arrays for bidirectional data transfers • 512 x 18-Bit - 512 x 18-Bit IDT72511 • 1024 x 18-Bit - 1024 x 18-Bit (IDT72521)

6420H

Abstract: IDT72511 IDT72521
Contextual Info: IDT72511 IDT72521 PARALLEL BIDIRECTIONAL FIFO 512 x 18 & 1024 x 18 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • Two side-by-side FIFO memory arrays for bidirectional data transfers • 512 x 18-Bit - 512 x 18-Bit IDT72511 • 1024 x 18-Bit - 1024 x 18-Bit (IDT72521)

Contextual Info: PARALLEL BIDIRECTIONAL FIFO 512 x 18 & 1024x18 IDT72511 IDT72521 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • Two side-by-side FIFO memory arrays for bidirectional data transfers • 512 x 18-Bit - 512 x 18-Bit IDT72511 • 1024 x 18-Bit -1024 x 18-Bit (IDT72521)

Contextual Info: PARALLEL BIDIRECTIONAL FIFO 512 x 18 & 10 24x18 IDT72511 IDT72521 FEATURES: DESCRIPTION: • Two side-by-side FIFO memory arrays for bidirectional data transfers • 512 x 18-Bit - 512 x 18-Bit IDT72511 • 1024 x 18-Bit - 1024 x 18-Bit (IDT72521) • 18-bit data buses on Port A side and Port B side

Contextual Info: PARALLEL BIDIRECTIONAL FIFO 512 x 18-BIT & 1024 x 18-BIT IDT72511 IDT72521 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • Two side-by-side FIFO memory arrays for bidirectional data transfers • 512 x 18 -B it - 5 1 2 x 1 8 - Bit IDT72511

Contextual Info: PARALLEL BIDIRECTIONAL FIFO 512 x 18 & 1024x18 IDT72511 IDT72521 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • Two side-by-side FIFO m em ory arrays for bidirectional data transfers • 512 x 18-Bit - 512 x 18-Bit IDT72511 • 1024 x 18-Bit -1 0 2 4 x 18-Bit (IDT72521 )

IDT72521

Abstract: pin configuration of i3 processor IDT72511 pbiw
Contextual Info: PARALLEL BIDIRECTIONAL FIFO 512 x 18-BIT & 1024 x 18-BIT IDT72511 IDT72521 In te g rated D e v ic e T e c h n o lo g y , In c . FEATURES: DESCRIPTION: • Two side-by-side FIFO memory arrays for bidirectional data transfers • 512 x 18 -Bit - 5 1 2 x 1 8 - Bit IDT72511

IDT72521

Abstract: 6420H DA11 IDT72511 DA12
Contextual Info: IDT72511 IDT72521 PARALLEL BIDIRECTIONAL FIFO 512 x 18 & 1,024 x 18 Integrated Device Technology, Inc. FEATURES: • Two side-by-side FIFO memory arrays for bidirectional data transfers • 512 x 18-Bit - 512 x 18-Bit IDT72511 • 1,024 x 18-Bit - 1,024 x 18-Bit (IDT72521)

Contextual Info: PARALLEL BIDIRECTIONAL FIFO 512 x 18-BIT & 1024 x 18-BIT IDT72511 IDT72521 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • Two side-by-side FIFO memory arrays for bidirectional data transfers • 512 x 18 - Bit - 512 x 18 - Bit IDT72511 • 1024 x 18 - Bit - 1024 x 18 - Bit (IDT72521)

Contextual Info: IME D 'i n t e g r a t e d d e v i c e 4Ô2S771 G0Q3Ô17 4 • ~ rfisSSSX ' ' ’ " integratedDeviceTechndogyInc. ■ •" V- ’ - 1 K x 18-BIT CMOS BiFlFO ~ ' FEATURES: • Bi-directional Flrst-In/Flrst Out FIFO memory • Back-to-back 1 K x 18-bit F IF O organization

S-6160

Contextual Info: INTEGRATE» DEVICE 14E D • 4025771 00037^7 5 ■ P¿.f PRELIMINARY IDT 7252 IDT 72520 1Kx 18-BIT- 2 K x 9-BIT CMOS BiFIFO T 'H f i - 3 5 system performance o f the peripheral Interface b y eliminating mismatched bus widths. Ttie BiFIFO can handle data transfer be­

T53B

Abstract: 6420H IDT72511 IDT72521 P105 10Q BWA
Contextual Info: I N T E G R A T E D D E VI CE M7E D m M Û 2 S 7 7 1 QOOTtiMfi 4 E S I D T PARALLEL BIDIRECTIONAL FIFO 512 x 18-BIT & 1024 x 18-BIT - r - ¥ é Integrated Device Technology, Inc. IDT72511 IDT72521 - 3 f FEATURES: DESCRIPTION: • Two side-by-side FIFO memory arrays for bidirectional

Contextual Info: FIN A L COM'L: -10/12/15 IND:-12/14/18 MACH4-256/MACH4LV-256 V A N A IM T A M D I S High-Performance EE CMOS Programmable Logic C O M P A N Y DISTINCTIVE CHARACTERISTICS ♦ ♦ ♦ ♦ ♦ ♦ 208 pins in PQFP 256 macrocells 10 ns t PD Commercial, 12 ns tPD Industrial

Contextual Info: BUS-MATCHING BIDIRECTIONAL FIFO 512 x 18-BIT - 1024 x 9-BIT 1024 x 18-BIT - 2048 x 9-BIT IDT7251 IDT7252 IDT72510 IDT72520 FEATURES: DESCRIPTION: • Two side-by-side FtFO memory arrays for bidirectional data transfers • 5 1 2 x 1 8 -Bit - 1 0 2 4 x 9 - Bit IDT7251, IDT72510

at enhance v520

Contextual Info: !< & / Integrated Dev Ice Technology» Inc. BUS-MATCHING BIDIRECTIONAL FIFO 512 x 18-BIT - 1024 X 9-BIT 1024 x 18-BIT - 2048 x 9-BIT IDT7251 . '° 5 2 IDT72520 FEATURES: DESCRIPTION: • Two side-by-side FIFO memory arrays lor bidirectional data transfers

IDT72510

Abstract: IDT7252 IDT72520 IDT725Z pin diagram of TVC 2 HB
Contextual Info: DE VI CE M7E D MÔ2S771 Q O M f e n BUS-MATCHING BIDIRECTIONAL FIFO 512 x 1 8 - B IT - 1024 x 9-BIT 1024 x 18-BIT-2 0 4 8 x 9-BIT IDT Ô IDT7251 IDT7252 IDT72510 IDT72520 FEATURES: DESCRIPTION: • Two side-by-side FIFO memory arrays for bidirectional data transfers

Contextual Info: BUS-MATCHING BIDIRECTIONAL FIFO 512 x 18-BIT - 1024 x 9-BIT 1024 x 18-BIT - 2048 x 9-BIT IDT7251 IDT7252 IDT72510 IDT72520 FEATURES: DESCRIPTION: • Two side-by-side FIFO memory arrays for bidirectional data transfers • 5 1 2 x 1 8 -B it - 1 0 2 4 x 9 - Bit IDT7251, IDT72510

Contextual Info: PRELIMINARY COM'L: -7/10/12/15 IND: -10/12/14/18 MACH 4-192/MACH4LV-192 BEYO N D PERFO RM AN CE High-Performance EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS ♦ ♦ ♦ ♦ ♦ ♦ 144 pins in TQFP 192 macrocells 7.5 ns tPD Commercial, 10 ns tpD Industrial

Contextual Info: PRELIMINARY COM'L: -7/10/12/15 IND: -10/12/14/18 M A C H 4 -1 2 8 /M A C H 4 L V -1 2 8 V A N A IM T A M D I S High-Performance EE CMOS Programmable Logic C O M P A N Y DISTINCTIVE CHARACTERISTICS ♦ ♦ ♦ ♦ ♦ ♦ 100 pins in PQFP and TQFP 128 macrocells

Contextual Info: PARALLEL BIDIRECTIONAL FIFO 512 x 18 & 1 ,0 2 4 x 1 8 IDT72511 IDT72521 In t e g r a t e d D e v iz e T e c h n o lo g y , l i e . FEATURES: • Two side-by-side FIFO memory arrays for bidirectional data transfers • 512 x 18-Bit - 512 x 18-Bit IDT72511

Contextual Info: FINAL M A COM'L:-12/15 C H IN D :-18 1 2 0 - 1 2 /1 5 High-Performance EE CMOS Programmable Logic V AN A N A M D T I S C O M P A N Y DISTINCTIVE CHARACTERISTICS ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ 68 Pins in PLCC 48 Macrocells 12 ns tpoCommercial, 18 ns tP0 Industrial