OUTP15 Search Results

AA30

Abstract: AA34 AB30 M21110 PRBS MSB NCN30
Contextual Info: M21110 17 x 17 3.2 Gbps Crosspoint Switch with Input Equalization Data Sheet Features - 4 Terminal Descriptions - 5 Specification Tables - 7 Functional Description - 17 Register Information - 21 Package Information - 28 World Wide Sales Companies - 37 21110-DSH-001-B, 3/27/03

Contextual Info: CDCLVD2108 www.ti.com SCAS905C – OCTOBER 2010 – REVISED DECEMBER 2010 Dual 1:8 Low Additive Jitter LVDS Buffer Check for Samples: CDCLVD2108 FEATURES 1 • • • • • • • • • • • • Dual 1:8 Differential Buffer Low Additive Jitter <300 fs RMS in

Contextual Info: Sample & Buy Product Folder Support & Community Tools & Software Technical Documents CDCLVP1216 SCAS877D – MAY 2009 – REVISED JUNE 2014 CDCLVP1216 16 LVPECL Output, High-Performance Clock Buffer 1 Features 3 Description • • • The CDCLVP1216 is a highly versatile, low additive

R991

Abstract: OUTP12
Contextual Info: User's Guide SCAU029 – May 2009 Low Additive Phase Noise Clock Buffer Evaluation Board Figure 1. CDCLVP1216 Evaluation Board Features: • Easy-to-use evaluation board to fan out low phase noise clocks • Easy device setup • Fast configuration • Control pins configurable through jumpers