OTU 4 Search Results

SFI4.2 XFI

Abstract: S10124 S10123 S10126 S19252 S10123PSI stm 4 muxponder S10124PBI 10x10G stm 16 muxponder
Contextual Info: PRODUC T BRIEF Yahara - S10123, S10124, S10126 10G LAN/WAN/OTN Framer/Mapper/Phy with FEC Supports 10GBase-R/10GBaseW, OC-192/STM64, 8G/10G FC, OTU-2 Standard and Overclocked Client Signals Extensive Client Mapping Solutions into WIS and OTU-2 Line signals, including Bit

ODU cross connect

Abstract: SERDES 10G STM 64 FRAMER WITH OTN 10G serdes 40Gbps VC4-64c OTU-2 sfi-4 40G 300 OTN SWITCH
Contextual Info: FACTSHEET McPOM LAN-PHY MAPPER MB87Q2091 McPOM 10G Ethernet LAN-PHY Mapper • Supported bitrates: • STM-64 VC4-64c or STS-192c /10GBASE-W (9.95Gbps) • 10GBASE-R (10.31Gbps) • OTU-2 standard (10.71Gbps) • OTU-2 overclocked (11.05 and 11.1Gbps). Advanced device targeting Ethernet mapping and transport applications.

FIM37200

Abstract: 100GBASE-LR4
Contextual Info: 100GE CFP Transceiver Description • CFP MSA Compliant • Data rate 103.125G 100GE & 111.809G (OTU-4) • Hot-pluggable • +3.3V single power supply • Dimensions (L W H) 145 77 14 mm • RoHS compliant Specifications Part Number Application Data Rate, each lane

SCF1001L4

Abstract: 8029 l2 SCF1011L4LNGG01
Contextual Info: TS-S12D072D January, 2013 100Gb/s CFP Optical Transceiver Module SCF1001L4 Series 100GBASE-LR4, ITU-T OTU-4,1300nm 4-lane WDM, EA-DFB, PIN-PD Features Æ 4-lane x 25.78Gb/s L-WDM Optical Interface Ü High quality and reliability optical sub-assemblies Ü

OTU-9500

Abstract: OTU-8000 MTS 8000 otdr MTS-6000 gsm modem JDS Uniphase Raman Amplifier OTU8000 1625 OTDR Landmark Technology
Contextual Info: COMMUNICATIONS TEST & MEASUREMENT SOLUTIONS OTU-8000 Optical Test Unit Key Features • Wide range of applications from FTTx to ultra long haul network monitoring • Web browser access • Advanced fault location • Notification by e-mail or SMS • Small size 2U

250V T85 16 6 5E4

Contextual Info: C A T A L O S L IS T I N O MICRO SWITCH a wtm B Z - 2RW82T SW ITCH -B A SIC « H M itto u v w M m a k m u w c w n i t [ w | FED. MFR. CO D E 91929 .37 DIA X .15 WIDE SINTERED STAIN LESS STEEL ROLLER- .380+.030 h CM CD OTu- CM ° i N lë 1.188 ±.030 CD? 1.406 ±.030

MICRO SWITCH FREEPORT A ILLINOIS. USA DIVISION OF

Abstract: ALF1000 en ec 05 ENEC-05 micro switch t85-5e4 VEI 005
Contextual Info: C A T A L O G L IS T IN G H MICRO SWITCH D IV IS IO N OF BZ-2RQ-A2 SWITCH - BASIC F R E E P O R T . IL L IN O IS . U .S .A . A HO NEYW ELL ALF1000 FED. M FC. CODE » 1 9 2 » *u V < OJ J ft. . in < K 1 O OTu. CM ° • " N ^ CD CD < CL ,015 MAX P RETRAVEL

MG15G1AL3

Abstract: MG25M1BK1 MG50m1bk1 MG30G1BL3 MG50G1BL3 mg75g1bl1 MG200M1FK1 MG60M1AL1 MG30G1BL4 MG15H1AL1
Contextual Info: - 212 n p n . y - ' o Y - 7 l) - + - í ; U ' 5 f ' f ^ - * £ ¿ & R y - X « j & 't t t * á F f t T l, '. 6 ° iiá f t S d ít t i- ^ íá g i f ifi« ) > y 'J > h > * h 7 > y ^ ? l B U f fi^ íg K ft A L-1 r otu± h BK- 1 B L -I C c) x " r- 1 t B

INA106AM

Abstract: INA108 INA106 INA106BM INA106KP
Contextual Info: 001 HP 98 A 9 *6 A -arffl-fej XX+ IX + O lí 0X1 0IX ot OX 01 01 01 OX X ^ X flO ‘A X+ x+ I* m OOX OOX 90 X 11 + NIZ « i? ££Y otu /A rf 01 A /A * I 3 ,/A rf A rí OS 002 01 OX Z s 00 T A%\~~9 = o:>A + « $ 2 £ i 8 1 l X ^ ¿ n .-i s ® 00X OS

MG30GIBL3

Abstract: MG200 H-17 H-18 H-19
Contextual Info: - 212 n p n . y - ' o Y - 7 l) - + - í ; U ' 5 f ' f ^ - * £ ¿ & R y - X « j & 't t t * á F f t T l, '. 6 ° iiá f t S d ít t i- ^ íá g i f ifi« ) > y 'J > h > * h 7 > y ^ ? l B U f fi^ íg K ft A L-1 r otu± h BK- 1 B L -I C c) x " r- 1 t B

OTU2 framer

Abstract: verilog code for TCM decoder 8 BIT PROCESSOR USING VHDL
Contextual Info: CoreEl CC481 OTU2 Framer May 6, 2003 Product Specification AllianceCORE™ Facts separately Core Specifics See Table 1 Provided with Core Documentation User Guide, Design Guide EDIF netlist, NGC netlist Design File Formats Constraints Files cc481chp.ucf, cc481_wrap.ucf

OTU1

Abstract: XIP2174 Paxonet Communications OC48 ISE4 OTN testbench
Contextual Info: STS48 OTN Framer/Digital Wrapper CC381 July 9, 2002 Product Specification AllianceCORE Facts Provided with Core Documentation User Guide, Design Guide EDIF netlist Design File Formats Constraints File cc381.ucf Testbench, test scripts Verification Tool

ZL30155

Abstract: KEY 10g zl3015 10GBASE-R simple block diagram for digital clock
Contextual Info: DUAL CHANNEL UNIVERSAL CLOCK TRANSLATOR ZL30155 PRODUCT PREVIEW The ZL30155 Dual Channel Universal Clock Translator, part of Zarlink’s ClockCenter platform of Synchronous Clock devices, delivers industry-leading synchronization performance for high-speed complex applications. The highly integrated

Contextual Info: OPTICAL FIBERS OPTICAL CABLES OPTICAL COMPONENTS RFTS / EQUIPMENT FiMO: Fiber Monitoring System Fiber MOnitoring system FiMO provides trouble shooting and preventive maintenance monitoring fiber network 24 hours a day constantly. Features ¡Reduce Down-Time and operational costs

Contextual Info: 7 C A D - O r ig in a l ÄNDERUNGEN D IE DEM TECH­ Z e ic h n u n g n i c h t ä n d e r n NISCHEN FORTSCHRITT D IEN EN , SEHALTEN WIR UNS VOR Z e ic h n u n g g e s c h ü tz t d u rc h c C o p y rIg h t 1987 In d e x AMP DEUTSCHLAND GmbH A l l e R e ch te v o rb e h a L te n

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Contextual Info: L9D364M64SBG2 4.0 Gb, DDR3, 64 M x 64 Integrated Module IMOD Benefits FEATURES DDR3 Integrated Module [iMOD]: "‚"XDD?XDDS?307X"ø"20297X ‚"307X"egpvgt/vgtokpcvgf."rwuj1rwnn" K1Q " ‚"Rcemcig<"38oo"z"44oo"z"304oo." 35"z"43"ocvtkz"y1"493dcnnu " ‚"Ocvtkz"dcnn"rkvej<"3022oo

Contextual Info: PRELIMINARY INFORMATION L9D3256M32DBG2 L9D3512M32DBG2 16-32 Gb, DDR3, 256-512M x 32 Dual Channel Memory Module Benefits FEATURES DDR3 Integrated Module [iMOD]: "‚"XDD?XDDS?3057X"/202897X1-203X ‚"3057X"egpvgt/vgtokpcvgf."rwuj1rwnn" K1Q " ‚"Rcemcig<"38oo"z"44oo"z"304oo."

BIP-8

Abstract: PAYLOAD NTT encoder chip NLC0375APB NLC375APB STM-64 DI15-00
Contextual Info: PRELIMINARY Digital Wrapper with Forward Error Correction for 10Gbps Optical Transport Network NLC0375APB NTT Electronics Corporation November 2001 c NTT Electronics Corporation NLC0375APB < Features > Compliant with ITU-T G.709 Recommendation FEC algorithm: Reed-Solomon code RS8 (255,239), Coding gain: 6db

QSFP

Abstract: MPLS over optical packet switching OTU1 PDH/SDH stm 4 muxponder ethernet over sdh QSFP 40G transceiver stm 16 muxponder STM-16 Architecture ethernet over pdh
Contextual Info: Optical Transport Networks for 100G Implementation in FPGAs WP-01115-1.1 White Paper Based on announcements from vendors, enterprises and service providers, 100G system deployment is finally gaining real traction in the marketplace. The primary driver for this deployment is the customers’ ceaseless demand for higher bandwidth.

CY78991

Abstract: CY7B991 CY7B9911 CY7B9911V CY7B9911V-5JC
Contextual Info: CY7B9911V 3.3V RoboClock+ m CYPRESS High Speed Low Voltage Programmable Skew Clock Buffer PRELIMINARY Features • All output pair skew <100 ps typical 250 max. • 3 .7 5 -to 110-MHz output operation • User-selectable output functions — Selectable skew to 18 ns

ZL30155

Abstract: ZL30142 ZL30143 zl30160 zl30310 IEEE1588 stm 4 muxponder stm 16 muxponder ZL30112 ZL30320
Contextual Info: TIMING AND SYNCHRONIZATION PRODUCT CATALOG 1 Line Card Synchronizers Rate Conversion PLLs ZL30110 ZL30112 ZL30113 See Page 4 PDH ZL30106 See Page 2 IEEE 1588/SyncE ZL30316 ZL30320 See Page 2 OTN, SyncE SONET/SDH ZL30155 ZL30160 See Page 2 SyncE SONET/SDH

wj 69

Contextual Info: 4 <K;B< BE<A 5 ?FHD < A>HD>JB<:CCN I>:C>= H>C:N MBJA <FBC JH:EIB>EJ IKGGH>IIBFE A?8647 ?RO\]ZR[ . . . . . . . EehY[ XWbWdY[Z jof[ T_j^ Ye_b jhWdi_[dj ikffh[ii_ed 69@ YedjWYji im_jY^_d] YWfWX_b_jo EW_bkh[ hWj[ YWd X[ b[l[b J G_]^ WcX_[dj Wffb_YWX_b_jo @bb c[jWb m[bZ[Z YedijhkYj_ed

R529

Abstract: GE R529
Contextual Info: 4<K;B< BE<A 6 ?FHD < A>HD>JB<:CCN I>:C>= C:J<ABE@ H>C:N MBJA <FBC JH:EIB>EJ IKGGH>IIBFE A?8755 ?RO\]ZR[ EehY[ XWbWdY[Z bWjY^_d] h[bWo T_j^ Ye_b jhWdi_[dj ikffh[ii_ed 54@ YedjWYji im_jY^_d] YWfWX_b_jo EW_bkh[ hWj[ b[l[b YWd X[ b[l[b J G_]^ WcX_[dj Wffb_YWX_b_jo