OPTI TECHNOLOGIES Search Results

transistor t348

Abstract: transistor t349 t345 diode transistor t342 T328 GRM40F104Z50PT diode t318 S M T209 ttl 7436 T203 DIODE
Contextual Info: 82C871 USB 2.0 82C871 On-The-Go Controller Data Book 912-2003-001 Revision 1.1 25 March 2003 Rev.1.1 OPTi Technologies, Inc. Page 1 Copyright Copyright 2003 OPTi Technologies, Inc. All rights reserved. No part of this publication may be reproduced, transmitted,

82C463

Abstract: MINISCRIBE Headland Technology Product Group Cyrix 486 dx2 486dlc 7 segment display t525 Campus Italia Vol 1 T226 headland technology 82c461
Contextual Info: OPTi 82C463 Preliminary Databook V2.1 OPTi Single Chip Notebook SCNB 82C463 DATA BOOK Preliminary Version 2.1 g July 7, 1993 Page 1 S2C463 07A 7/9Jg 111111111111 ITffl MW Ï VI » I HM PB • !■■■ ■ ■ ^ ■ ■ 1 ■ ■ ■ mut mi ■■■■! ■■■ ■

marcon 10v 47uf

Abstract: T2D 65 DIODE panasonic T2D DIODE EEFUEOG181R FDS6680A LRF2010-01-R005J LTC1435 LTC1735 LTC1735CGN MBRS340T3
Contextual Info: • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ U FEATURES LTC1735 High Efficiency Synchronous Step-Down Switching Regulator DESCRIPTIO Synchronizable/Programmable Fixed Frequency OPTI-LOOPTM Compensation Minimizes COUT ±1% Output Voltage Accuracy

ir2910

Abstract: NPN RF Amplifier Marcon electrolytic T2D DIODE EEFUEOG181R FDS6680A LRF2010-01-R005J LTC1435 LTC1735 LTC1735CGN
Contextual Info: • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ U FEATURES LTC1735 High Efficiency Synchronous Step-Down Switching Regulator DESCRIPTIO Synchronizable/Programmable Fixed Frequency OPTI-LOOPTM Compensation Minimizes COUT ±1% Output Voltage Accuracy

ELEVATOR LOGIC CONTROL complete projects

Abstract: projects based on fuzzy logic PID controller for elevator control using fuzzy temperature controller
Contextual Info: INTEGRATING FUZZY LOGIC TECHNOLOGY INTO CONTROL SYSTEMS Glen B. Cunningham Togai InfraLogic, Inc. 5 Vanderbilt, Suite A Irvine, California 92718 fuzzy system architect another choice to help opti­ mize the design tradeoffs. Abstract Among the developments influencing design of con­

Contextual Info: MMMmmmssssssssssssssssss MODULE Buffered, 2 M x 64 BITS Hyper Page Mode DRAM Module, 5 V, 1-bank • DESCRIPTION The Fujitsu MB8502E064AB is a fully decoded, CMOS Dynamic Random.Access Memory DRAM module consisting of eight M B8117805A devices. The MB8502E064AB is opti mi zed: for those applications requiring high

Contextual Info: 908 Series ST Style Fiber Optic Connectors Methode 908 Series ST Style interconnects are opti­ cally and mechanically intermateable with AT&T ST® products and all other functional equivalents. The Methode 908 Series includes single mode and multimode connectors, couplings, device receptacles and

motherboard major problems

Abstract: burst bus mode in 80486 interrupt 80486 interrupt in 80486 vesa local bus design OPTi chipset 486 opti chipset 80486 memory devices signal path designer QAN11
Contextual Info: PowerPC HIGHLIGHTS TM QAN11 601 CPU Interface to VESA Bus QuickLogic QL12x16 device controls system interface logic connecting PowerPCTM 601 CPU to OPTI chipset that supports PC/AT standard Fast 33 MHz VESA bus operation Converts 64-bit 601 CPU data cycles into 32-bit cycles for VESA bus

IP 8082 BL

Abstract: INTEL 8082 CPU 82C382 Interface 8Kx8 RAM memory using 4kx4 memory chips 82c381 82C482 opti 486 chipset 82C481 etherlink III schematic IC-1406
Contextual Info: HiD/386 AT CHIPSET HIGH INTEGRATION DIRECT MAPPED CACHE AT 82C381 /82C382D-25/33 Software configurable Command Delays, Wait States and Memory Organization 100% IBM PC/AT Compatible 386/AT Chipset for 25 and 33 MHz systems Designed to provide the most cost-effective, higji

Contextual Info: Advance Data Sheet 01 I C r O 0 I 8 C t r O fl I C S g r O U p January 1998 Lucent Technologies Bell Labs Innovations 10 G b i t s / s a n d 20 G b i t s / s L i t h i u m N i o b a t e SLIM-PAC Electro-Optic M odulator Features • Slim, herm etic package

82C568

Abstract: 82C567 4464 64k dram 4464 dram HA20C md4203 AD7166 82C566 SiS chipset 486 opti 82c
Contextual Info: 82C566/82C567/82C568 Viper-MAX Chipset Scaleable MultiMedia PC Solution 1.0 Features CPU Interface • Fully supports all Intel 3.3V Pentium processors P54C™, P55C™, P55CT™ at 50, 60, and 66.667MHz • Supports AMD® K86™ and Cyrix® 6x86 processors

Contextual Info: S E R IE S 18 .438" Double Row Phenolic Barrier Terminal Strip D escription Features The series 18 phenolic double row terminal strip is one of our most versatile products. The terminal block is offered in feed-thru and open bottom designs and is available in a variety of terminal and

Contextual Info: D EVELOPM ENT S UPPO RT TOOLS D EV EL OP M ENT S U PP ORT T OO LS Fuj i t su’ s SPARCl i t e 9 3 0 Ser i es i s suppor t ed by a ful l r ange of PC- and Sun- based devel opment tool s that si gni fi cantl y r educe ti me- to- mar ket for advanced embedded

ST 9336

Abstract: Automatic car ADSP-21161 ADSP-21060 ADSP-21061 ADSP-21062 ADSP-21065 ADSP-21160M ADSP-21161N ADSP-21161 assembler
Contextual Info: ADSP-21161 32-Bit SHARC DSP High Performance for Price-Sensitive Applications KEY FEATURES: • 100 MHz 10 ns SIMD SHARC DSP core ■ 600 MFLOPS (32-bit floatingpoint data), 600 MOPS (32-bit fixed-point data) ■ ■ Code-compatible with ADSP-21x6x SHARC DSPs

MPC8260

Abstract: MSC8101 SC140
Contextual Info: MSC8101 The industry’s most powerful network-ready DSP Leading the way as the first integrated CPM, the MSC8101 has StarCore architecture-based DSP, the unique ability to connect to the the MSC8101 is also the most network, manage the layer 2 and powerful integrated DSP optimized

SDHC specification

Abstract: SD host controller vhdl tsmc 0.18um GPS clock code using VHDL GPS clock code using verilog vhdl code for memory card digital clock using logic gates sdio sdio memory silicon fingerprint technology
Contextual Info:  Compatibility  SD Memory Card version 2.00 including SDHC SDIO-HOST  SDIO Card version 2.00 SD/SDIO/MMC Card Host Controller Core  SDIO Host Specification ver-  MMC Card version 3.31 sion 1.00  General SD interface features  SD1/SD4 modes of operation

usb 2.0 implementation using verilog

Abstract: verilog code for dma controller verilog code for phy interface philips usb ahb slave verilog code verilog code for ahb master
Contextual Info: USBHS-OTG-MPD USB Hi-Speed On-The-Go Controller for Multiple Peripheral Devices Core Complies with the USB 2.0 specification and On-The-Go supplement to the USB 2.0 specification In Host Mode, supports HiSpeed hubs and multiple LowSpeed, Full-Speed or Hi-Speed

Contextual Info: Par ad ig m ' OEM and Subsystems Overview Paradigm Technology brings together our expertise as a leading supplier of SRAM products with the space savings and flexibility of module packaging. This allows us to offer a complete family of standard and custom memory modules.

MT41LC256K32D4

Abstract: BEDO RAM MT4C16270 Matsushita fp-m MT4LC4M4G6 MT4C1004J MT4C16257 MT4C4001J MT4LC1M16C3 MT4LC1M16E5
Contextual Info: TM Burst EDO DRAMs TECHNOLOGY, INC. 1 What are Burst EDO DRAMs? Burst EDO BEDO DRAMs are the Best Solution for 66 MHz Systems ❏ Standard DRAMs with shorter page mode cycle times ❏ EDO DRAMs that contain a pipeline stage and a 2-bit burst counter ❏

Contextual Info: Advance Data Sheet February 1 998 m I C f 0 8 I C t f 0 il î € S grOUp Lucent Technologies Bell Labs Innovations 1 3 2 0 - T y p e L i g h t w a v e R e c e i v e r wi t h C l o c k R e c o v e r y a n d D a t a R e t i m i n g for 2 4 8 8 . 3 2 M b i t s / s A p p l i c a t i o n s

CX29704

Abstract: 7 segmen
Contextual Info: PortMakerII AAL5 Firmware C X 2 74 7 0 Traffic Stream Processor OC-12 Adaptation Layer 5 SAR PortMakerII firmware provides proven, reliable and fully supported binary applications for the CX27470 Traffic Stream Processor. The ATM adaptation layer 5 AAL5

Contextual Info: GMC 8022 from version 813b GMC 8022 E from version 813b Data sheet Gas Measuring and Alarm Systems Analysis Systems GMC 8022 / GMC 8022 E Data sheet Application The analysis unit GMC 8022 and GMC 8022E in connection with test probes with 4.20 mA signal output has the following functions:

features and architecture of tms320c6x

Abstract: dsp processor Architecture of TMS320C6X application of tms320c6x TMS320C6x TMS320C6X FEATURES DIGITAL WRISTWATCH features TMS320C6x Mountain-510 VME64 dsp application in power system generation
Contextual Info: TMS320C6x—The Future of DSP Solutions 1 6 0 0 M I P S In one broad stroke, Texas Instruments’ new TMS320C6x DSPs — redefine the future of digital signal processing design. The ‘C6x generation transports the world of data- and telecommunications into an entirely

WT546

Abstract: AN2456 TCP500 TH1 "cross reference" STLC3055N LCP1521S LCP152DEE STLC3055 st power line application note
Contextual Info: AN2456 Application note Protection of single battery voltage SLICs for new networks in US market Introduction Despite the widespread proliferation of digital technologies, analog networks remain the most commonly used telecommunication means in the world. Thanks to its simple and