OCL91 Search Results

D22A

Contextual Info: LH5420/ 256 FEATURES X 36 X 2 Bidirectional FIFO FUNCTIONAL DESCRIPTION • Fast Cycle Times: 25/30/35 ns • Two 256 x 36-bit FIFO Buffers • Full 36-bit Word Width • Selectable 36/18/9-bit Word Width on Port B • Fully Asynchronous Port-to-Port Communications

MD 7144

Abstract: lh5494
Contextual Info: LH5494/ 4K X9 Serial-toParallel FIFO input and output ports respectively. However, these ‘clocks' also may be aperiodic, asynchronous ‘demand’ signals: they do not need to be synchronized with each other in any way. Almost all control input signals and

lh5492

Contextual Info: LH5492-/ 4K x 9 Clocked FIFO simplify system design. The input and output ports oper­ ate altogether independently of each other, except when the FIFO becomes either absolutely full or else absolutely empty. FEATURES • Fast Cycle Times: 25/35/50 ns Frequency: 40/28.5/20 MHz

lh5493

Contextual Info: LH5493 / 4K x 9 Parallel-to-Serial FIFO FEATURES • Fast Cycle Times: 25/35/50 ns Frequency: 40/28.5/20 MHz • Parallel Data In; Serial Data and/or Parallel Data Out • Serial Input and Serial Shift Capability in Output Register, for Long-Word-Length Parallel-to-Serial

Contextual Info: ADVANCE INFORMATION ^-LH540215/25 512 x 18 /1 0 2 4 x 18 Synchronous FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 15/20/25/35 ns • Pin-Compatible Drop-In Replacements for IDT72215A/25A FIFOs; Delault Operating Mode is Functionally IDT-Compatible