NS 129 Search Results

Contextual Info: TM4SK64KPU 4194304 BY 64-BIT TM8SK64KPU 8388608 BY 64-BIT SYNCHRONOUS DYNAMIC RAM MODULES - SODIMM _SMMS691A-AUGUST 1997 - REVISED NOVEMBER 1997 10 *CK3 10 ns *CK2 10 ns <AC3 7.5 ns *AC2 9 ns 12 12 ns 12 ns 8 ns 9.5 ns • • •

52C8128

Abstract: V52C8128
Contextual Info: M O SEL V tT E U C V52C8128 MULTIPORT VIDEO RAM WITH 128K X 8 DRAM AND 256 X 8 SAM 70 80 10 Max. RAS Access Time, tRAC 70 ns 80 ns 100 ns Max. CAS Access Time, (tCAC) 20 ns 25 ns 25 ns Max. Column Address Access Time, ( t ^ ) 35 ns 40 ns 50 ns Min. Fast Page Mode Cycle Time, (tPC)

Contextual Info: M O SEL V tTE LtC V53C16129H HIGH PERFORMANCE 128K X 16 B IT EDO PAGE MODE CMOS DYNAMIC DRAM HIGH PERFORMANCE PRELIMINARY 40 45 50 60 Max. RAS Access Time, tRAC 40 ns 45 ns 50 ns 60 ns Max. Column Address Access Time, (tCAA) 20 ns 22 ns 24 ns 30 ns Min. Extended Data Out Page Mode Cycle Time, (tPC)

Contextual Info: M O S E L V /TE LiC V52C8128 MULTIPORT VIDEO RAM WITH 128K X 8 DRAM AND 256 X 8 SAM 70 80 10 Max. RAS Access Time, tHAC HIGH PERFORMANCE V52C812B 70 ns 80 ns 100 ns Max. CAS Access Time, Ocac ) 20 ns 25 ns 25 ns Max. Column Address Access Time, (t*) 35 ns

V52C8128

Abstract: V52C8128-80
Contextual Info: MOSEL- VITELIC V52C8128 MULTIPORT VIDEO RAM WITH 128K X 8 DRAM AND 256 X 8 SAM HIGH PERFORMANCE V52C8128 70 PRELIMINARY 80 10 Max. RAS Access Time, tRAc 70 ns 80 ns 100 ns Max. CAS Access Time, (tcAc) 20 ns 25 ns 25 ns Max. Column Address Access Time, ( t ^ )

Contextual Info: M OSEL VI TEL IC V35644Q15KG 5.0 VOLT 4M x 64 HIGH PERFORMANCE UNBUFFERED DIMM MODULE HIGH PERFORMANCE 50 60 Max. RAS Access Tim e, tpj^c 50 ns 60 ns Max. CAS Access Tim e, (tcAc) 13 ns 15 ns Min. Cycle Time, (tpc) 84 ns 104 ns Min. EDO Mode Cycle Time, (tpc)

Contextual Info: CMOS DRAM KM41C4001A 4 M X 1 Bit CMOS Dynamic RAM with Nibble Mode FEATURES GENERAL DESCRIPTION Perform ance range: tR A C tC A C tR C 70 ns 20 ns 130ns K M 4 1 C 4 0 0 1 A- 8 80 ns 20 ns 1 50 ns K M 4 1 C 4 0 0 1 A -1 0 100 ns 25 ns 1 80 ns K M 4 1 C 4 0 0 1 A- 7

W777777

Contextual Info: JUN 1 2 1992 Ijr‘ VITEUC V52C8128 MULTIPORT VIDEO RAM WITH 128KX8 DRAM AND 256 X 8 SAM HIGH PERFORMANCE V52C8128 80 10 Max. RAS Access Time, tRAc 80 ns 100 ns Max. CAS Access Time, (tcAc) 25 ns 25 ns Max. Column Address Access Time, (t^ ) 45 ns 50 ns Min. Fast Page Mode Cycle Time, (tpc)

DS1023

Abstract: DS1023-025 DS1023-050 DS1023-100 DS1023-200 DS1023-25 DS1023-50 DS1023-500 DS1023S
Contextual Info: DS1023 8-Bit Programmable Timing Element www.dalsemi.com FEATURES PIN ASSIGNMENT Step sizes of 0.25 ns, 0.5 ns, 1 ns, 2 ns, 5 ns On-chip reference delay Configurable as delay line, pulse width modulator, or free-running oscillator Can delay clocks by a full period or more

74F04

Abstract: DS1023 DS1023-100 DS1023-200 DS1023-25 DS1023-50 DS1023-500 DS1023S
Contextual Info: DS1023 8-Bit Programmable Timing Element www.maxim-ic.com FEATURES § § § § § § § § PIN ASSIGNMENT Step sizes of 0.25 ns, 0.5 ns, 1 ns, 2 ns, 5 ns On-chip reference delay Configurable as delay line, pulse width modulator, or free-running oscillator

DS1023-25

Abstract: DS1023-500 74F04 DS1023 DS1023-100 DS1023-200 DS1023-50 DS1023S
Contextual Info: DS1023 8-Bit Programmable Timing Element www.maxim-ic.com FEATURES § § § § § § § § PIN ASSIGNMENT Step sizes of 0.25 ns, 0.5 ns, 1 ns, 2 ns, 5 ns On-chip reference delay Configurable as delay line, pulse width modulator, or free-running oscillator

Contextual Info: DS1023 8-Bit Programmable Timing Element www.maxim-ic.com PIN ASSIGNMENT FEATURES § § § § § § § § Step sizes of 0.25 ns, 0.5 ns, 1 ns, 2 ns, 5 ns On-chip reference delay Configurable as delay line, pulse width modulator, or free-running oscillator

DS1023-50

Abstract: DS1023 74F04 DS1023-100 DS1023-200 DS1023-25 DS1023-500 DS1023S
Contextual Info: DS1023 8-Bit Programmable Timing Element www.maxim-ic.com FEATURES § § § § § § § § PIN ASSIGNMENT Step sizes of 0.25 ns, 0.5 ns, 1 ns, 2 ns, 5 ns On-chip reference delay Configurable as delay line, pulse width modulator, or free-running oscillator

Contextual Info: PRELIMINARY V58C2128 804/404/164 SAT HIGH PERFORMANCE 2.5 VOLT 128 Mbit DDR SDRAM 4 BANKS X 4Mbit X 8 (804) 4 BANKS X 2Mbit X 16 (404) 4 BANKS X 8Mbit X 4 (164) MOSEL VITELIC Clock Cycle Time (tCK2) 7 75 8 DDR266A DDR266B DDR200 7.5 ns 10 ns 10 ns 7 ns 7.5 ns

Contextual Info: M O S E L V I T E L 1C V35642R05KG 5.0 VO LT2 M x 64 H IG H PER FO R M A NC E U NBUFFERED D IM M EDO M O D U LE HIGH PERFORMANCE 50 60 Max. RAS Access Tim e, tpj^c 50 ns 60 ns Max. CAS Access Tim e, (tcAc) 13 ns 15 ns Min. Cycle Time, (tpc) 84 ns 104 ns

Contextual Info: M O S E L V I T E L 1C V33642R05KG 3.3 VO LT2 M x 64 H IG H PER FO R M A NC E U NBUFFERED D IM M EDO M O D U LE HIGH PERFORMANCE 50 60 Max. RAS Access Time, tRAc 50 ns 60 ns Max. CAS Access Time, (tcAc) 13 ns 15 ns Min. Cycle Time, (tpc) 84 ns 104 ns Min. EDO Mode Cycle Tim e, (tpc)

RAS 05

Contextual Info: M O S E L V I T E L 1C V33644Q15KG 3.3 V O L T 4 M x 64 H IG H P ER FO R M A NC E U NBUFFERED D IM M M O D U LE HIGH PERFORMANCE 50 60 Max. RAS Access Time, tRAc 50 ns 60 ns Max. CAS Access Time, (tcAc) 13 ns 15 ns Min. Cycle Time, (tpc) 84 ns 104 ns Min. EDO Mode Cycle Time, (tpc)

Contextual Info: POR009 Effective: 5/11/2015 PREFERRED DISTRIBUTOR PRICE LIST PORTABLE CORD Yellow 90 Yellow 90 Yellow 105 Super Vu-Tron Supreme Gauge SOOW SJOOW SOOW SJOOW SOOW SEOOW SJEOOW 18/2 455.11 412.66 NS NS NS 455.11 412.66 18/3 590.57 484.71 618.07 506.94 NS 590.57

DS1023-500

Abstract: DS1023-1
Contextual Info: DS1023 8-Bit Programmable Timing Element www.dalsemi.com FEATURES PIN ASSIGNMENT Step sizes of 0.25, 0.5 ns, 1 ns, 2 ns, 5 ns On-chip reference delay Configurable as delay line, pulse width modulator, or free-running oscillator Can delay clocks by a full period or more

Contextual Info: POR007 Effective: 9/2/2014 PREFERRED DISTRIBUTOR PRICE LIST PORTABLE CORD Yellow 90 Yellow 90 Yellow 105 Super Vu-Tron Supreme Gauge SOOW SJOOW SOOW SJOOW SOOW SEOOW SJEOOW 18/2 408.91 370.78 NS NS NS 408.91 370.78 18/3 530.62 435.51 555.33 455.48 NS 530.62

LUCENT DSP1610

Abstract: 4017 data sheet ic 4017 ic 4017 ic cd 4017 T76B DATA SHEET IC 4011 data sheet ic 4017 intel 4040 pin diagram of ic 4520 DB10 DSP1617
Contextual Info: Data Sheet March 2000 DSP1627 Digital Signal Processor 1 Features • Optimized for digital cellular applications with a bit manipulation unit for higher coding efficiency. ■ On-chip, programmable, PLL clock synthesizer. ■ 14 ns and 11 ns instruction cycle times at 5 V, 10 ns instruction cycle time at 3.0 V, and 20 ns and 12.5 ns instruction cycle times at 2.7 V, respectively.

CQX 89

Abstract: pulse width measure counter delay clock DS1023 DS1023-100 DS1023-200 DS1023-25 DS1023-50 DS1023-500 DS1023S
Contextual Info: Î * DALLAS wmfâQHwœrom DS1023 8-Bit Programmable Timing Element www.dalsemi.com FE A TU R E S • Step sizes of 0.25, 0.5 ns, 1 ns, 2 ns, 5 ns ■ On-chip reference delay ■ Configurable as delay line, pulse width modulator, or free-running oscillator

54009

Abstract: bt34w
Contextual Info: Data Sheet January 2002 DSP1627 Digital Signal Processor 1 Features • Optimized for mobile communications applications with a bit manipulation unit for higher coding efficiency. ■ On-chip, programmable, PLL clock synthesizer. ■ 14 ns and 11 ns instruction cycle times at 5 V, 10 ns instruction cycle time at 3.0 V, and 20 ns and 12.5 ns instruction cycle times at 2.7 V.

TL O74

Abstract: AT6002 AT6003 AT6005 AT6010
Contextual Info: AT6000/LV Series Features • • • • • • • • • • High Performance System Speeds > 100 MHz Flip-Flop Toggle Rates > 250 MHz 1.2 ns/1.5 ns Input Delay 3.0 ns/6.0 ns Output Delay Up to 204 User I/Os Thousands of Registers Cache Logic Design