NKD PACKAGING Search Results

NKD-100-D

Contextual Info: NKD-100-D MILLIMETER-WAVE FREQUENCY DOUBLER MMIC 5GHz TO 24GHz Typical Applications • Narrow and Broadband Commercial and • Upconversion Stage used in MW Radio/Optical Designs Military Radio Designs • Linear and Saturated Radio Applications UNITS: Inches

nkd packaging

Contextual Info: NKD-100-D MILLIMETER-WAVE FREQUENCY DOUBLER MMIC 5GHz TO 24GHz Typical Applications • Narrow and Broadband Commercial and • Upconversion Stage used in MW Radio/Optical Designs Military Radio Designs • Linear and Saturated Radio Applications Product Description

Contextual Info: NKD-100-D MILLIMETER-WAVE FREQUENCY DOUBLER MMIC 5GHz TO 24GHz Typical Applications • Narrow and Broadband Commercial and • Upconversion Stage used in MW Radio/Optical Designs Military Radio Designs • Linear and Saturated Radio Applications Product Description

Contextual Info: RURP840CC, RURP850CC, RURP860CC m uADDie m aO NkD UkC TiOsR S E M I C 8A, 400V - 600V Ultrafast Dual Diodes A pril 1995 Features Package • Ultrafast with Soft Recovery JEDEC TO-22ÛAB <60ns • Operating Tem p eratu

Contextual Info: LMK04820 Family Low-Noise Clock Jitter Cleaner with Dual Loop PLLs 1.0 General Description 3.0 Features The LMK04820 family is the industry's highest performance clock conditioner with JEDEC JESD204B support. The dual loop PLLatinum architecture enables sub-100 fs RMS jitter

Contextual Info: LMK04820 Family Low-Noise Clock Jitter Cleaner with Dual Loop PLLs 1.0 General Description 3.0 Features The LMK04820 family is the industry's highest performance clock conditioner with JEDEC JESD204B support. The dual loop PLLatinum architecture enables sub-100 fs RMS jitter

Contextual Info: LMK04820 Family Low-Noise Clock Jitter Cleaner with Dual Loop PLLs 1.0 General Description 3.0 Features The LMK04820 family is the industry's highest performance clock conditioner with JEDEC JESD204B support. The dual loop PLLatinum architecture enables sub-100 fs RMS jitter

Contextual Info: LMK04800 www.ti.com SNAS489J – MARCH 2011 – REVISED MARCH 2013 LMK04800 Family Low-Noise Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04800 1 FEATURES 123 • Ultra-Low RMS Jitter Performance – 111 fs RMS Jitter 12 kHz to 20 MHz – 123 fs RMS Jitter (100 Hz to 20 MHz)

LMK04800

Abstract: LMK0480X
Contextual Info: LMK04800 www.ti.com SNAS489J – MARCH 2011 – REVISED MARCH 2013 LMK04800 Family Low-Noise Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04800 1 FEATURES 123 • Ultra-Low RMS Jitter Performance – 111 fs RMS Jitter 12 kHz to 20 MHz – 123 fs RMS Jitter (100 Hz to 20 MHz)

Contextual Info: LMK04800 www.ti.com SNAS489J – MARCH 2011 – REVISED MARCH 2013 LMK04800 Family Low-Noise Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04800 1 FEATURES 123 • Ultra-Low RMS Jitter Performance – 111 fs RMS Jitter 12 kHz to 20 MHz – 123 fs RMS Jitter (100 Hz to 20 MHz)

Contextual Info: LMK04800 www.ti.com SNAS489J – MARCH 2011 – REVISED MARCH 2013 LMK04800 Family Low-Noise Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04800 1 FEATURES 123 • Ultra-Low RMS Jitter Performance – 111 fs RMS Jitter 12 kHz to 20 MHz – 123 fs RMS Jitter (100 Hz to 20 MHz)

Contextual Info: ADC16V130 www.ti.com SNAS458E – NOVEMBER 2008 – REVISED MARCH 2013 ADC16V130 16-Bit, 130 MSPS A/D Converter With LVDS Outputs Check for Samples: ADC16V130 FEATURES APPLICATIONS • • • • 1 2 • • • • • • • • Dual Supplies: 1.8V and 3.0V Operation

LMK0480X

Abstract: lmk04800
Contextual Info: LMK04800 www.ti.com SNAS489I – MARCH 2011 – REVISED MARCH 2012 LMK04800 Family Low-Noise Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04800 FEATURES 1 • Ultra-Low RMS Jitter Performance – 111 fs RMS jitter 12 kHz to 20 MHz – 123 fs RMS jitter (100 Hz to 20 MHz)

Contextual Info: LMK04820 Family Low-Noise Clock Jitter Cleaner with Dual Loop PLLs 1.0 General Description 3.0 Features The LMK04820 family is the industry's highest performance clock conditioner with JEDEC JESD204B support. The dual loop PLLatinum architecture enables sub-100 fs RMS jitter

SQA64A

Abstract: JESD204B JESD-20
Contextual Info: LMK04820 Family Low-Noise Clock Jitter Cleaner with Dual Loop PLLs 1.0 General Description 3.0 Features The LMK04820 family is the industry's highest performance clock conditioner with JEDEC JESD204B support. The dual loop PLLatinum architecture enables sub-100 fs RMS jitter

Contextual Info: ADC16V130 www.ti.com SNAS458E – NOVEMBER 2008 – REVISED MARCH 2013 ADC16V130 16-Bit, 130 MSPS A/D Converter With LVDS Outputs Check for Samples: ADC16V130 FEATURES APPLICATIONS • • • • 1 2 • • • • • • • • Dual Supplies: 1.8V and 3.0V Operation

Contextual Info: ADC16V130 www.ti.com SNAS458E – NOVEMBER 2008 – REVISED MARCH 2013 ADC16V130 16-Bit, 130 MSPS A/D Converter With LVDS Outputs Check for Samples: ADC16V130 FEATURES APPLICATIONS • • • • 1 2 • • • • • • • • Dual Supplies: 1.8V and 3.0V Operation

Contextual Info: Product Folder Sample & Buy Support & Community Tools & Software Technical Documents LMK04821, LMK04826, LMK04828 SNAS605AQ – MARCH 2013 – REVISED AUGUST 2014 LMK0482x Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs 1 Features

LMK0480X

Abstract: TCXO 24.576 Dual Varactor Diode with Common Cathode IC HS 8167 a 9514 SNAS489J 79212
Contextual Info: LMK04800 www.ti.com SNAS489J – MARCH 2011 – REVISED MARCH 2013 LMK04800 Family Low-Noise Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04800 1 FEATURES 123 • Ultra-Low RMS Jitter Performance – 111 fs RMS Jitter 12 kHz to 20 MHz – 123 fs RMS Jitter (100 Hz to 20 MHz)

Contextual Info: LMK04826B, LMK04828B www.ti.com SNAS605 AP – MARCH 2013 – REVISED JUNE 2013 LMK0482xB Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04826B, LMK04828B 1 INTRODUCTION 1.1 Features 12 • JEDEC JESD204B Support

LMK04828BISQE

Abstract: LMK04828B
Contextual Info: LMK04826B, LMK04828B www.ti.com SNAS605 AP – MARCH 2013 – REVISED JUNE 2013 LMK0482xB Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04826B, LMK04828B 1 INTRODUCTION 1.1 Features 12 • JEDEC JESD204B Support

Contextual Info: LMK04826B, LMK04828B www.ti.com SNAS605 AP – MARCH 2013 – REVISED JUNE 2013 LMK0482xB Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04826B, LMK04828B 1 INTRODUCTION 1.1 Features 12 • JEDEC JESD204B Support

ms 21921-6

Contextual Info: ADC16V130 www.ti.com SNAS458D – NOVEMBER 2008 – REVISED MAY 2010 ADC16V130 16-Bit, 130 MSPS A/D Converter With LVDS Outputs Check for Samples: ADC16V130 FEATURES • 1 • • • • 2 • • • • • Dual Supplies: 1.8V and 3.0V operation On chip automatic calibration during power-up

Contextual Info: LMK04826B, LMK04828B www.ti.com SNAS605 AP – MARCH 2013 – REVISED JUNE 2013 LMK0482xB Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04826B, LMK04828B 1 INTRODUCTION 1.1 Features 12 • JEDEC JESD204B Support