NE N8 Search Results

Contextual Info: Signetlcs RF Communications Product specification Video amplifier NE/SA/SE592 DESCRIPTION FEATURES The NE/SA/SE592 is a monolithic, two-stage, differential output, wideband video amplifier. It offers fixed gains of 100 and 400 without external components and adjustable gains

SE592H

Abstract: NE592H SA592D8 NE592 Signetics Signetics NE592
Contextual Info: Signetics NE/SA/SE592 Video Amplifier Product Specification Linear Products DESCRIPTION The NE/SA/SE592 is a monolithic, twostage, differential output, wideband vid­ eo amplifier. It offers fixed gains of 100 and 400 without external components and adjustable gains from 400 to 0 with

NE5217D

Contextual Info: Philips Sem iconductors Data C om m unications Products Product specification Postamplifier with link status indicator DESCRIPTION NE/SA5217 PIN CONFIGURATION The NE /S A5217 is a 75M Hz postam plifier system designed to accept low level high-speed signals. These signals are converted

NE592H

Abstract: SA592D8 ne592n14 SE592 SE592F14 SE592H
Contextual Info: Signetics NE/SA/SE592 Video Amplifier Product Specification Linear Products DESCRIPTION FEATURES The NE/SA/SE592 is a monolithic, twostage, differential output, wideband vid­ eo amplifier. It offers fixed gains of 100 and 400 without external components and adjustable gains from 400 to 0 with

Signetics NE592

Contextual Info: NE/SA/SE592 V id eo Amplifier Product Specification Line ar P rod ucts DESCRIPTION The NE/SA/SE592 is a monolithic, twostage, differential output, wideband vid­ eo amplifier. It offers fixed gains of 100 and 400 without external components and adjustable gains from 400 to 0 with

NE592H

Abstract: NE592N SE592H ay de tog ne NE592F
Contextual Info: NE/SE592 NE/SE592 Video Amplifier GENERAL DESCRIPTION FEATURES The N E /S E 59 2 is a monolithic, two-stage, differential output, wideband video amplifier. It offers fixed gains of 100 and 400 without external components and adjustable gains from 0 to 400 with one external resistor. The input stage has

Contextual Info: Rev: 063008 DS3 3 X 1 6 2 /DS3 3 X 1 6 1 /DS3 3 X 8 2 /DS3 3 X 8 1 / DS3 3 X 4 2 /DS3 3 X 4 1 /DS3 3 X 1 1 /DS3 3 W4 1 /DS3 3 W1 1 Et he r ne t Ove r PDH M a pping Devic e s Ge ne ra l De sc ript ion The DS33X162 family of semiconductor devices extend 10/100/1000Mbps Ethernet LAN segments by

592F

Abstract: NE592D 32-il ne592 video amplifier circuits
Contextual Info: Philips Semiconductors-Signeîics RF Communications Products Product specification Video amplifier NE592 DESCRIPTION FEATURES The NE 592 is a m onolithic, tw o-sta ge, differentia! output, w id e b a n d vid eo am plifier. It • 120M H z unity gain ban dw idth

57C291

Abstract: B35t
Contextual Info: WS57C191B/291B HIGH SPEED 2K x 8 CMOS PROM/RPROM KEY FEATURES • U ltra-Fast A ccess T im e _ 3 5 ns • Pin C om patible w ith A m 27S 191/291 and N82S191 B ipolar PRO M s • Low P ow er C onsum ption • Im m u ne to Latch-U P • Fast P ro gram m ing

Contextual Info: Advanced v0.7  ProASICPLUS Flash Family FPGAs Fe a t ur es an d B e ne f i ts • High Performance, Low Skew, Splitable Global Network • 100% Routability and Utilization High C apaci t y • 75,000 to 1 million System Gates • 27k to 198kbits of Two-Port SRAM

Contextual Info: Rev: 031008 Ge ne ra l De sc ript ion The DS33X162 demo kit DK is an easy-to-use evaluation board for the DS33X162 Ethernet-overPDH device. The demo kit contains an option for either T3/E3 or T1/E1 serial links. All serial links are complete with line interface, transformers, and

Contextual Info: WS57C43B HIGH SPEED 4K x 8 CMOS PROM/RPROM K E Y FEA TU R E S • U ltra-Fast A ccess Tim e • Pin C om patible with A m 27S 43 and N82S321 B ipolar P RO M s — 35 ns • Low Pow er C onsum ption Im m u ne to Latch-U p • Fast Program m ing — Up to 200 mA

SE592H

Abstract: Signetics NE592 NE592H sa592 NE/SA/SE592 NE592n8
Contextual Info: Philips Components-Signefics Document No. 853-0911 91255 ECN No. Date of Issue Status N ovem ber 3, 1987 NE/SA/SE592 Video amplifier Product Specification RF Communications D E S C R IP T IO N FEATURES The N E/SA /S E 592 is a monolithic, two-stage, differential output, wideband

tt6061

Abstract: dh6af pm3388fi PM3011 31ab marking PM3388H-FI
Contextual Info: 8: 20 PM S/UNI10xGE Telecom Standard Product Data Sheet Released ru sd ay ,0 7F eb S/UNI 10xGE ar y, 20 07 06 :5 PM3388 In co n W ed ne Ten-Port Gigabit Ethernet Controller Proprietary and Confidential Released Issue No. 8: January, 2007 Do wn l oa de d by

Contextual Info: v2.0 ProASIC 500K Family I/O Fe a t ur es an d B e ne f i ts • Mixed 2.5V/3.3V Support with Individually-Selectable Voltage and Slew Rate • 3.3V, PCI Compliance PCI Revision 2.2 High C apaci t y • 100,000 to 475,000 System Gates • 14k to 63k Bits of Two-Port SRAM

w18 cms transistor

Abstract: model RB-30 S PT 100 A500K A500K270 APA1000 APA150 APA300 APA450 APA600 APA750
Contextual Info: Advanced v0.3 ProASICPLUS APA Family Fe a t ur es an d B e ne f i ts I/O High C apaci t y • Mixed 2.5V/3.3V Support with Individually-Selectable Voltage and Slew Rate • Bidirectional Global I/Os • PCI Compliance with PCI Revision 2.2 Including 3.3V, 64-bit

Contextual Info: LI NE AR T E C H N O L O G Y CORP 43E D • 55104LÛ 0005200 T HLTC LTC1062/883 LintAB. TECHNOLOGY 5th O rder Low Pass Filter 6H-05 DESCRIPTION ABSOLUTE MAXIMUM RATINGS The LTC1062/883 is a 5th order all pole maximally flat lowpass filter with no DC error. Its unusual architec­

Contextual Info: 0: 13 AM SBSLITE ASSP Telecom Standard Product Data Sheet Released ec em sd ay ,2 2D SBSLITE be r, 20 04 01 :4 PM8611 In co n W ed ne SBI Bus Serializer Proprietary and Confidential Released Issue No. 5: June 2002 Do wn l oa de d by C on te n tT ea m of Pa

model RB-30 S PT 100

Abstract: RAM256X9SST Libero FIFO256X9SSRP GL25 A500K050 A500K130 A500K180 A500K270 OB-25
Contextual Info: v3.0 ProASIC 500K Family I/O Fe a t ur es an d B e ne f i ts • Mixed 2.5V/3.3V Support with Individually-Selectable Voltage and Slew Rate • 3.3V, PCI Compliance PCI Revision 2.2 High C apaci t y • 100,000 to 475,000 System Gates • 14k to 63k Bits of Two-Port SRAM

8 pin diagram 393w

Abstract: RBDR OTB33LL A500K270 RAM256X9AA
Contextual Info: Preliminary v1.1 ProASIC 500K Family I/O Fe a t ur es an d B e ne f i ts • Mixed 2.5/3.3 Volt Support • 3.3V, 33 MHz PCI Compliance PCI Revision 2.2 • Individually Selectable 2.5V or 3.3V I/Os and Slew Rate High C apaci t y • 100,000 to 475,000 System Gates

RAM256X9SST

Abstract: ProASIC PLUS v0.1
Contextual Info: Advanced v0.6 ProASICPLUS Family Flash FPGAs Fe a t ur es an d B e ne f i ts I/O High C apaci t y • Schmitt Trigger option on Every Input • Mixed 2.5V/3.3V Support with Individually-Selectable Voltage and Slew Rate • Bidirectional Global I/Os • Compliance with PCI Specification Revision 2.2

Contextual Info: PM7350 S/UNI DUPLEX RELEASED DATA SHEET DUAL SERIAL LINK PHY MULTIPLEXER PM ISSUE 8 08 :0 3: 38 PMC-1980581 20 05 PM7350 TM be r, S/UNI- ,1 4D ec em DUPLEX n W ed ne sd ay S/UNI DUPLEX DATA SHEET RELEASED ISSUE8: DECEMBER 2005 Do wn lo ad ed by Co nt e nt

d1514

Abstract: LC72321 LC72323 LC72P321 LC7232 vd010 ph3ar
Contextual Info: Ordering num ber : EN}$<4968 CMOS LSI LC72P321 No. & 4968 SANTO Single-C hip M icro co n tro ller + PLL with O n-C hip O ne-Tim e PROM Preliminary Concerning Sanyo’s ROM writing service Overview The LC72P321 is a one-lime programmable PROM version of the LC72321/322/323 single-chip microcontroller plus

Contextual Info: :0 1: 29 PM S/UNI-1x10GE ASSP Telecom Standard Product Data Sheet Released ru ar y, 20 07 07 PM3392 ne sd ay ,0 7F eb S/UNI 1x10GE Data Sheet Proprietary and Confidential Released Issue No. 7: December, 2006 Do wn l oa de d by C on te n tT ea m of Pa rtm in