NB7L585MNR4G Search Results
NB7L585MNR4G Datasheets (1)
Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
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NB7L585MNR4G |
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2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer / Translator | Original | 148.16KB | 9 |
NB7L585MNR4G Price and Stock
onsemi NB7L585MNR4GIC CLK BUFFER 1:6 5GHZ 32QFN |
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NB7L585MNR4G | Cut Tape | 749 | 1 |
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NB7L585MNR4G | Reel | 14 Weeks | 1,000 |
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NB7L585MNR4G | 489 |
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NB7L585MNR4G | 5,720 | 40 |
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NB7L585MNR4G | Reel | 1,000 |
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NB7L585MNR4G | 7,881 | 1 |
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NB7L585MNR4G | 3,081 |
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NB7L585MNR4G | 14 Weeks | 1,000 |
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NB7L585MNR4G | 1,000 |
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NB7L585MNR4G | 2,270 | 1 |
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onsemi NB7L585MNGClock Drivers & Distribution 2.5/3.3V DIFF MUX |
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NB7L585MNG |
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NB7L585MNR4G Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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NB7L585MNG
Abstract: NB7L585MNR4G PRBS23 QFN32 QFN-32 footprint
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Original |
NB7L585 NB7L585 NB7L585/D NB7L585MNG NB7L585MNR4G PRBS23 QFN32 QFN-32 footprint | |
Contextual Info: NB7L585 2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer / Translator http://onsemi.com Multi−Level Inputs w/ Internal Termination MARKING DIAGRAM 1 Description The NB7L585 is a differential 1:6 LVPECL Clock/Data distribution |
Original |
NB7L585 NB7L585 NB7L585/D | |
Contextual Info: NB7L585 2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer / Translator http://onsemi.com Multi−Level Inputs w/ Internal Termination MARKING DIAGRAM 1 Description The NB7L585 is a differential 1:6 LVPECL Clock/Data distribution |
Original |
NB7L585 NB7L585/D | |
Contextual Info: NB7L585 2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer / Translator http://onsemi.com Multi−Level Inputs w/ Internal Termination MARKING DIAGRAM Description The NB7L585 is a differential 1:6 LVPECL Clock/Data distribution chip featuring a 2:1 Clock/Data input multiplexer with an input select |
Original |
NB7L585 NB7L585 NB7L585/D |