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    NATIONAL SEMI 16 PIN DIP Search Results

    NATIONAL SEMI 16 PIN DIP Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    CLC449A/BPA
    Rochester Electronics LLC CLC449 - Op Amp, Ultra-Wideband, 1.2 GHZ - Dual marked (5962-9752001MPA) PDF Buy
    MD82C288-10/R
    Rochester Electronics LLC 82C288 - Control/Command Signal Generator PDF Buy
    54AC377/SSA
    Rochester Electronics LLC 54AC377/SSA - Dual marked (M38510/75603SSA) - SPACE-LEVEL LOGIC PDF Buy
    UHC508J/883C
    Rochester Electronics LLC UHC508 - Dual marked (8550001DA) - Power Driver, NAND, Quad 2-Input PDF Buy
    MG80C186XL-20/B
    Rochester Electronics LLC 80C186XL - High Integrted 16 Bit PDF Buy

    NATIONAL SEMI 16 PIN DIP Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Contextual Info: 3581-112-18 BURR-BROWN PGA207PA TO NATIONAL SEMI. LH0084CD FOOTPRINT • Converts 28 pin PLCC package to obsolete DIP 20 footprint. • Also available with a PLCC socket. SPECIFICATIONS: • PCB is FR-4,.062 [1.56] or .094 [2.39] thick. • Male pin is Brass Alloy 360 1/2 hard per UNS C36000


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    PGA207PA LH0084CD C36000 ASTM-B16-85. MIL-T-10727 MIL-P-81728 QQ-N-290. PDF

    NMC93C46M8

    Abstract: NMC93C06N nmc93c46 NMC9306 NMC9346 NMC93C56 NMC93C66 NMC93C06EN
    Contextual Info: NATL S EMI COND MEMORY 3IE D b S O iiat. 001,3451 b National Semiconductor O <o CO o NMC93C06/C46 256-Bit/1024-Bit Serial Electrically Erasable Programmable Memory General Description Compatibility with Other Devices The NMC93C06/NMC93C46 are 256/1024 bits of CMOS


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    NMC93C06/C46 256-Bit/1024-Bit NMC93C06/NMC93C46 16-blt NMC93C06/ NMC93C48 X015X. NMC93CÃ T-46-13-27 Tt/D/8790-10 NMC93C46M8 NMC93C06N nmc93c46 NMC9306 NMC9346 NMC93C56 NMC93C66 NMC93C06EN PDF

    6047B

    Abstract: 6047B-FP
    Contextual Info: Temic H604615 / U6047B S e m i c o n ü u c t o r s Rear Window Heating Timer/ Long-Term Timer Description The bipolar long-term timers U6046B and U4047B are designed to limit the operation time of high loads in the harsh automotive enviroment automatically by a preset


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    H604615 U6047B U6046B U4047B D-74025 21-Apr-99 6047B 6047B-FP PDF

    U6052

    Contextual Info: Tem ic U6057B S e m i c o n ü u c tors Receiver for Point-to-Point Multiplex Systems Description Local, low speed multiplex systems reduce the amount of wires and connectors, save costs and weight and increase the safety in automotive and industrial applications. The


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    U6057B U6057B D-74025 21-Apr-99 U6052 PDF

    C65 004 TO-247

    Abstract: SMD RA3 PNP smd schottky diode s4 63a Diode smd s6 63A C65 004 DIODE C65 TO-247 DAC PIC16F877 APPLICATION NOTE TRANSISTOR R57 phillips 12a g1 battery fuse Diode C65 004
    Contextual Info: PS052 PowerCal 2 Calibration Platform Features • Hardware platform for configuration, calibration and test of Microchip battery management products • Operates under control of Windows based PowerMate™ software PS7XX and PowerTool™ 500 software (PS5XX) through an


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    PS052 RS-232 DS21817B-page C65 004 TO-247 SMD RA3 PNP smd schottky diode s4 63a Diode smd s6 63A C65 004 DIODE C65 TO-247 DAC PIC16F877 APPLICATION NOTE TRANSISTOR R57 phillips 12a g1 battery fuse Diode C65 004 PDF

    outsourcing IBM

    Abstract: avnet celestica flextronics national semiconductor CC
    Contextual Info: Considerations in Converting from SMT to Die Assemblies National Semiconductor Technical Seminar Series Die Product Business Unit June 26 2003 1 Approaches, Options & Solutions • Die conversion trends and drivers • Die interconnect approaches • Device and information resources


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    PDF

    J14A1

    Abstract: 74F14 canton AS 5 74f14sc
    Contextual Info: Semi co n d u > t December 1994 o r 54F/74F14 Hex Inverter Schmitt Trigger General Description The ’F14 contains six logic inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input sig­


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    54F/74F14 positive11 J14A1 74F14 canton AS 5 74f14sc PDF

    PC6015

    Contextual Info: SI ERRA SEMI CONDUCTOR '»r SIERRA SEMICONDUCTOR ÇORP 47E ì> 0242010 0001724 T «SSC Semicustom Capability Analog, Digital and EEPROM combined on the same chip. Sierra is a leading supplier of m ixed-signal standard cell ASICs. The Com pany's unique Triple Technology process perm its the


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    PDF

    Contextual Info: 100353 Low Power 8-Bit Register General Description Features The 100353 contains eight D-type edge triggered, master/ slave flip-flops with individual inputs Dn , true outputs (Qn), a clock input (CP), and a common clock enable pin (CEN). Data enters the master when CP is LOW and transfers to the


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    Av1-800-737-7018 PDF

    DB9 Right Angle PCB Mount

    Abstract: phoenix connector 16A socket outlet DB9 Right Angle PCB Mount dimension db9 pcb mount female pic16c745-i/sp db9 pcb mount LM317MDT-1 powermate pic16F876
    Contextual Info: PS051 PowerInfo 2 Configuration Interface Features • Hardware platform for configuration, verification and test of Microchip PS70X and PS5XX ICs • Operates under control of Windows based PowerMate™ PS70X software and PowerTool™ 500 (PS5XX) software through an


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    PS051 PS70X PS70X) RS-232 RS-23: DS21815C-page DB9 Right Angle PCB Mount phoenix connector 16A socket outlet DB9 Right Angle PCB Mount dimension db9 pcb mount female pic16c745-i/sp db9 pcb mount LM317MDT-1 powermate pic16F876 PDF

    Contextual Info: Semi co n d u November 1995 t o r 74VHC4040 12-Stage Binary Counter General Description Features The VHC4040 is an advanced high-speed CMOS device fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar


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    74VHC4040 12-Stage VHC4040 PDF

    0c002

    Contextual Info: Semi co n d u August 1993 t o r 54AC/74AC273 Octal D Flip-Flop General Description Features The ’273 has eight edge-triggered D-type flip-flops with indi­ vidual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input load and reset (clear) all


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    54AC/74AC273 20-3A 0c002 PDF

    UCC27512-EP

    Abstract: UCC27512
    Contextual Info: REVISIONS LTR DESCRIPTION DATE Prepared in accordance with ASME Y14.24 APPROVED Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 PMIC N/A PREPARED BY Phu H. Nguyen Original date of drawing YY MM DD CHECKED BY 13-06-06 4 Phu H. Nguyen


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    V62/13608 5962-V065-13 V62/13608-01XE UCC27512MDRSTEP UCC27512-EP UCC27512 PDF

    ACT32

    Abstract: 54AC32 54ACTQ32 74AC AC32
    Contextual Info: Semiconductor 54AC32 Quad 2-Input OR Gate General Description The ’AC/’ACT32 contains four, 2-input OR gates. Features Outputs source/sink 24 mA ’ACT32 has TTL-compatible inputs Standard Military Drawing SMD — ’AC32: 5962-87614 For Military 54ACT32, see the 54ACTQ32


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    54AC32 ACT32 54AC/74AC 54ACT32, 54ACTQ32 54AC32 54ACTQ32 74AC AC32 PDF

    Contextual Info: Tem ic U6046B / U6047B S e m i c o n d u c t o r s Rear Window Heating Timer/ Long-Term Timer Description The bipolar long-term timers U6046B and U4047B are designed to limit the operation time of high loads in the harsh automotive enviroment automatically by a preset


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    U6046B U6047B U4047B D-74025 07-Jun-99 PDF

    Contextual Info: REVISIONS LTR DESCRIPTION DATE Prepared in accordance with ASME Y14.24 APPROVED Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 PMIC N/A PREPARED BY RICK OFFICER Original date of drawing YY-MM-DD CHECKED BY RAJESH PITHADIA 13-06-12 4


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    V62/13612 5962-V050-13 PDF

    transistor smd za

    Abstract: DEVICE MARKING CODE motorola soic hc
    Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview MC74LCX258 Low-Voltage CMOS Quad 2-Input Multiplexer With 5V-Tolerant Inputs and Outputs 3-State, Inverting The MC74LCX258 is a high performance, quad 2–input inverting multiplexer with 3–state outputs operating from a 2.7 to 3.6V supply. High


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    MC74LCX258 BR1339 transistor smd za DEVICE MARKING CODE motorola soic hc PDF

    LCX240

    Abstract: VHC 32
    Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low-Voltage CMOS 16-Bit Buffer MC74LCX16244 With 5V-Tolerant Inputs and Outputs 3-State, Non-Inverting The MC74LCX16244 is a high performance, non–inverting 16–bit buffer operating from a 2.7 to 3.6V supply. The device is nibble controlled.


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    16-Bit MC74LCX16244 BR1339 LCX240 VHC 32 PDF

    Contextual Info: REVISIONS LTR DESCRIPTION DATE Prepared in accordance with ASME Y14.24 APPROVED Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 PMIC N/A PREPARED BY Phu H. Nguyen Original date of drawing YY MM DD CHECKED BY 13-01-11 Phu H. Nguyen


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    V62/13603 5962-V038-13 V62/13603-01XE CKV2310EP CDCVF2310MPWREP CDCVF2310MPWEP PDF

    Contextual Info: REVISIONS LTR DESCRIPTION DATE Prepared in accordance with ASME Y14.24 APPROVED Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE PMIC N/A 1 2 3 4 5 6 7 8 9 PREPARED BY CHECKED BY APPROVED BY Thomas M. Hess SIZE A REV AMSC N/A 12 TITLE Phu H. Nguyen


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    V62/12602 5962ms/Smcr/. V62/12602-01XE 51116M TPS51116MPWPEP TPS51116MPWPREP PDF

    Contextual Info: Semi co n d u August 1995 t o r 74F382 4-Bit A rith m etic Logic Unit General Description Features The ’F382 performs three arithmetic and three logic opera­ tions on two 4-bit words, A and B. Two additional Select input codes force the Function outputs LOW or HIGH. An


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    74F382 PDF

    Contextual Info: REVISIONS LTR DESCRIPTION DATE APPROVED A Add a footnote to Table I. Add two footnotes to figure 1. Update boilerplate paragraph to current requirements. - ro 10-10-19 C. SAFFLE B Add device type 02. Table I, Line regulation and Load regulation tests, under conditions column,


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    TPS54680QPWPREP V62/04641-02XE TPS54680MPWPEP TPS54680MPWPREP V62/04641 PDF

    Contextual Info: REVISIONS LTR DESCRIPTION DATE Prepared in accordance with ASME Y14.24 APPROVED Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 PMIC N/A PREPARED BY RICK OFFICER Original date of drawing YY-MM-DD CHECKED BY RAJESH PITHADIA 13-07-01 4


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    V62/13610 5962-V048-13 V62/13610-01XE THS4500MDGNREP THS4500MDGNEP PDF

    Contextual Info: REVISIONS LTR DESCRIPTION DATE Prepared in accordance with ASME Y14.24 APPROVED Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV 1 PAGE 2 3 PMIC N/A PREPARED BY Phu H. Nguyen Original date of drawing YY MM DD CHECKED BY 13-02-04 4 Phu H. Nguyen


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    V62/13602 5962-V046-13 V62/13602-01XE CAVCB164245MDGGREP CAVCB164245MDGGEP AVCB164245M PDF